topic Re: i.MX8M Mini RMII REF_CLK in i.MX Processors

i.MX8M Mini RMII REF_CLK

nikz1402 — Thu, 31 Dec 2020 10:26:03 GMT

Hi,

I am using i.MX8M Mini processor (MIMX8MM4CVTKZAA) in one project having industrial surveillance application.

In datasheet, i am not able to identify behavior of ENET0_TD2 pin in RMII and RGMII mode. There may be some typo error i think (not sure about this). Refer attachment.

For your information, we want to use RMII mode.

As per my understanding, for RMII mode, this pin has two options; one for generating 50MHz clock and second for receiving 50MHz clock. And these two options are software configurable. Please confirm if i am right. If not, please help me to understand this.

Thanks in advance,

Nikhil

Re: i.MX8M Mini RMII REF_CLK

Yuri — Mon, 04 Jan 2021 07:22:15 GMT

@nikz1402
Hello,

Your understanding is correct - ENET0_TD2 pin in RMII is used as reference clock,
input or output, depending on IOMUXC_GPR_GPR1.

Regards,
Yuri.

Re: i.MX8M Mini RMII REF_CLK

nikz1402 — Mon, 04 Jan 2021 09:38:41 GMT

@Yuri

Thanks for for confirmation.

Regards,

Nikhil

Re: i.MX8M Mini RMII REF_CLK

kl4m4 — Wed, 01 Dec 2021 12:00:26 GMT

Hi! Did you manage to get that RMII output clock working? I need the same setup, but m ENET1_TD2 pad outputs 125 MHz, and only after I manually set bit13 in IOMUXC_GPR_GPR1 at runtime.

Any luck?

Cheers,

Mateusz

Re: i.MX8M Mini RMII REF_CLK

nikz1402 — Fri, 03 Dec 2021 05:31:20 GMT

Hi,

I managed to get 50MHz RMII clock output from ENET_TD2 (Processor pin# AG25) pad.

Please check your schematic connection once or share schematic pdf here so that i can check.

If your schematic is okay, then there must be something missing/misinterpreted in code.

Regards,

Nikhil

Re: i.MX8M Mini RMII REF_CLK

kl4m4 — Fri, 03 Dec 2021 06:24:33 GMT

Hi Nikhil,

I got my imx8mm on a SODIMM module (that one). Vendor does not provide schematic for it, but specified that certain sodimm pin is directly connected to AG25 procesor pad. And I have that pin connected to XI input of my PHY chip. There is not much more to it. Could you share a piece of your device tree with FEC relate pin configuration?

fsl,pins = <
    MX8MM_IOMUXC_ENET_ ...    
    ...
>;

And the fragment that descibes FEC config itself

fec1: ethernet@30be0000 {
    compatible = "fsl,imx8mm-fec", "fsl,imx8mq-fec", "fsl,imx6sx-fec";
    ......
}

Have a nice day!

Mateusz