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    <title>topic Re: imx7ulp USB HSIC in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/imx7ulp-USB-HSIC/m-p/1377279#M183554</link>
    <description>&lt;P&gt;Hello&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/193119"&gt;@guillaume-enlaps&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;We have ever spent much more time in debugging HSIC on i.MX7ULP for a customer from India , who also used HSIC EVK board. we also borrowed HSIC EVK board from microchip for the debugging purpose.&lt;/P&gt;
&lt;P&gt;In the end, we found USB OTG1 clock would lose as soon as HSIC(USB OTG2) was enabled, which means USB OTG1 can't be used at the time, so any way, whether it is device or host , it can't work.&lt;/P&gt;
&lt;P&gt;So for your application, you had better choose a HSIC HUB with 4 ports, which can ensure USB HOST Ports is enough for your application.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Have a good day!&lt;/P&gt;
&lt;P&gt;Regards,&lt;/P&gt;
&lt;P&gt;weidong&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
    <pubDate>Fri, 26 Nov 2021 00:27:34 GMT</pubDate>
    <dc:creator>weidong_sun</dc:creator>
    <dc:date>2021-11-26T00:27:34Z</dc:date>
    <item>
      <title>imx7ulp USB HSIC</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx7ulp-USB-HSIC/m-p/1371785#M183077</link>
      <description>&lt;P&gt;Hello&lt;/P&gt;&lt;P&gt;I try to make 2nd USB host (HSIC) of imx7ulp-evkb work with EVB-USB4640 (from microchip).&lt;/P&gt;&lt;P&gt;I try device tree and kernel config modification based on this discussions :&lt;/P&gt;&lt;UL&gt;&lt;LI&gt;&lt;A href="https://community.nxp.com/t5/i-MX-Processors/How-to-interface-USB-HSIC-on-iMX8QM-in-devicetree/m-p/1068303#M156957" target="_blank" rel="noopener"&gt;https://community.nxp.com/t5/i-MX-Processors/How-to-interface-USB-HSIC-on-iMX8QM-in-devicetree/m-p/1068303#M156957&lt;/A&gt;&lt;/LI&gt;&lt;LI&gt;&lt;A href="https://community.nxp.com/t5/i-MX-Processors/How-to-enable-HSIC-on-MCIMX7ULP-EVK/m-p/963539" target="_blank" rel="noopener"&gt;https://community.nxp.com/t5/i-MX-Processors/How-to-enable-HSIC-on-MCIMX7ULP-EVK/m-p/963539&lt;/A&gt;&lt;/LI&gt;&lt;/UL&gt;&lt;P&gt;&lt;U&gt;Software :&lt;/U&gt;&lt;BR /&gt;- Base : BSP Linux 5.10.52_2.1.0&lt;BR /&gt;- Devicetree modification :&amp;nbsp; add 2nd USB host with both path attached&lt;BR /&gt;- Kernel config modification, add : CONFIG_PINCTRL_SINGLE=y&lt;/P&gt;&lt;P&gt;Resuslts :&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;1) If a hub is connected on 1st USB, I have following error message from kernel :&lt;/STRONG&gt;&lt;/P&gt;&lt;LI-CODE lang="c"&gt;ci_hdrc ci_hdrc.1: port 1 reset error -110
usb 2-1: device no response, device descriptor read/64, error -71&lt;/LI-CODE&gt;&lt;P&gt;&lt;SPAN&gt;&lt;SPAN&gt;But both USB host is declared :&lt;BR /&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;LI-CODE lang="c"&gt;lsusb --tree --verbose
/:  Bus 02.Port 1: Dev 1, Class=root_hub, Driver=ci_hdrc/1p, 480M
    ID 1d6b:0002 Linux Foundation 2.0 root hub
/:  Bus 01.Port 1: Dev 1, Class=root_hub, Driver=ci_hdrc/1p, 480M
    ID 1d6b:0002 Linux Foundation 2.0 root hub
    |__ Port 1: Dev 2, If 0, Class=Hub, Driver=hub/4p, 480M
        ID 2109:2813 VIA Labs, Inc. VL813 Hub
        |__ Port 1: Dev 3, If 0, Class=Vendor Specific Class, Driver=ax88179_178a, 480M
            ID 0b95:1790 ASIX Electronics Corp. AX88179 Gigabit Ethernet&lt;/LI-CODE&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;2) If nothing is connected on 1st USB, I got a kernel panic :&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&lt;SPAN&gt;The origin of kernel panic is in function&amp;nbsp;&lt;EM&gt;'hw_phymode_configure'&lt;/EM&gt;.&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&lt;SPAN&gt;This line : &lt;A href="https://elixir.bootlin.com/linux/v5.10.35/source/drivers/usb/chipidea/core.c#L297" target="_blank" rel="noopener"&gt;core.c#L297&lt;/A&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;LI-CODE lang="c"&gt;hw_write(ci, OP_PORTSC, PORTSC_PTS(7) | PORTSC_PTW, portsc);&lt;/LI-CODE&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Any help/idea ?&lt;/P&gt;&lt;P&gt;__&lt;/P&gt;&lt;P&gt;Regards&lt;/P&gt;</description>
      <pubDate>Tue, 16 Nov 2021 08:23:59 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx7ulp-USB-HSIC/m-p/1371785#M183077</guid>
      <dc:creator>guillaume-enlaps</dc:creator>
      <dc:date>2021-11-16T08:23:59Z</dc:date>
    </item>
    <item>
      <title>Re: imx7ulp USB HSIC</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx7ulp-USB-HSIC/m-p/1373997#M183261</link>
      <description>&lt;P&gt;Hello&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/193119"&gt;@guillaume-enlaps&lt;/a&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Attachment is a patch that i.mx expert design, which is used for I.MX7ULP HSIC, BUT if enabling USB HSIC, USB OTG1 can't be used.&amp;nbsp; It means USB OTG1 and HSIC can't work at the same time, so you should eable USB HSIC after using USB OTG1.&lt;/P&gt;
&lt;P&gt;the patch is for linux 4.14.98 kernel. you can try to add it to the bsp version you are using.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Have a good day!&lt;/P&gt;
&lt;P&gt;Regards,&lt;/P&gt;
&lt;P&gt;weidong&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Fri, 19 Nov 2021 03:34:15 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx7ulp-USB-HSIC/m-p/1373997#M183261</guid>
      <dc:creator>weidong_sun</dc:creator>
      <dc:date>2021-11-19T03:34:15Z</dc:date>
    </item>
    <item>
      <title>Re: imx7ulp USB HSIC</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx7ulp-USB-HSIC/m-p/1375746#M183447</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;Thank you for the answer and the patch.&lt;/P&gt;&lt;P&gt;I'm trying to make it work (in progress).&lt;/P&gt;&lt;P&gt;Any way, I have some question about what you explained :&lt;BR /&gt;* Can I have both USBHOST (1&amp;amp;2) working at the same time ?&lt;BR /&gt;If no, is it an hardware or a software issue ?&lt;BR /&gt;* Why in the devicetree patch you provide, the 2nd USB (usbh) use the clock of 1st USB ?&lt;/P&gt;&lt;BLOCKQUOTE&gt;&lt;P&gt;clocks = &amp;lt;&amp;amp;clks IMX7ULP_CLK_USB0&amp;gt;;&lt;/P&gt;&lt;/BLOCKQUOTE&gt;&lt;P&gt;Thanks again !&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Guillaume&lt;/P&gt;</description>
      <pubDate>Tue, 23 Nov 2021 16:04:32 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx7ulp-USB-HSIC/m-p/1375746#M183447</guid>
      <dc:creator>guillaume-enlaps</dc:creator>
      <dc:date>2021-11-23T16:04:32Z</dc:date>
    </item>
    <item>
      <title>Re: imx7ulp USB HSIC</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx7ulp-USB-HSIC/m-p/1375872#M183456</link>
      <description>&lt;P&gt;Hello&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/193119"&gt;@guillaume-enlaps&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&amp;gt;&amp;gt;is it an hardware or a software issue ?&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Due to hardware limitation, if enable HSIC, USB OTG1 can't be used. so you will have to enable HSIC after downloading image through USB OTG1 is done. Then you will only have HSIC USB ports for your host application.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;Have a good day!&lt;/P&gt;
&lt;P&gt;Regards,&lt;/P&gt;
&lt;P&gt;weidong&lt;/P&gt;</description>
      <pubDate>Wed, 24 Nov 2021 01:42:42 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx7ulp-USB-HSIC/m-p/1375872#M183456</guid>
      <dc:creator>weidong_sun</dc:creator>
      <dc:date>2021-11-24T01:42:42Z</dc:date>
    </item>
    <item>
      <title>Re: imx7ulp USB HSIC</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx7ulp-USB-HSIC/m-p/1376946#M183534</link>
      <description>&lt;P&gt;Hello,&lt;BR /&gt;&lt;BR /&gt;Thanks again for your answer.&lt;BR /&gt;&lt;BR /&gt;1) Using your path, I still have some error when booting on USB HSIC :&lt;/P&gt;&lt;PRE&gt;device no response, device descriptor read/64, error -71&lt;/PRE&gt;&lt;P&gt;Maybe it's just hardware (HSIC wire) issue...&lt;BR /&gt;But no more kernel panic when nothings is plug on 1st USB (no HUB...).&lt;BR /&gt;I'm going to continue to do some test.&lt;BR /&gt;&lt;BR /&gt;2) About your response, and to be sure I well understood, you are saying that this king of configuration is not possible :&lt;BR /&gt;=&amp;gt; Reading from a device plugged on USB1HOST and writing to a device plugged on USB2HOST at the same time ?&lt;BR /&gt;A simple diagram to make sure that my question is clear :&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="imx7ulp - 2 USB HOST.png" style="width: 999px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/163201i5C22D54959F79EB8/image-size/large?v=v2&amp;amp;px=999" role="button" title="imx7ulp - 2 USB HOST.png" alt="imx7ulp - 2 USB HOST.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;BR /&gt;__&lt;BR /&gt;Guillaume&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;/P&gt;</description>
      <pubDate>Thu, 25 Nov 2021 09:42:38 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx7ulp-USB-HSIC/m-p/1376946#M183534</guid>
      <dc:creator>guillaume-enlaps</dc:creator>
      <dc:date>2021-11-25T09:42:38Z</dc:date>
    </item>
    <item>
      <title>Re: imx7ulp USB HSIC</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx7ulp-USB-HSIC/m-p/1377279#M183554</link>
      <description>&lt;P&gt;Hello&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/193119"&gt;@guillaume-enlaps&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;We have ever spent much more time in debugging HSIC on i.MX7ULP for a customer from India , who also used HSIC EVK board. we also borrowed HSIC EVK board from microchip for the debugging purpose.&lt;/P&gt;
&lt;P&gt;In the end, we found USB OTG1 clock would lose as soon as HSIC(USB OTG2) was enabled, which means USB OTG1 can't be used at the time, so any way, whether it is device or host , it can't work.&lt;/P&gt;
&lt;P&gt;So for your application, you had better choose a HSIC HUB with 4 ports, which can ensure USB HOST Ports is enough for your application.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Have a good day!&lt;/P&gt;
&lt;P&gt;Regards,&lt;/P&gt;
&lt;P&gt;weidong&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Fri, 26 Nov 2021 00:27:34 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx7ulp-USB-HSIC/m-p/1377279#M183554</guid>
      <dc:creator>weidong_sun</dc:creator>
      <dc:date>2021-11-26T00:27:34Z</dc:date>
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