System halt during DDR calibration.

danielmi — Wed, 23 Jan 2013 11:38:45 GMT

Hey there,

I'm wondering how to properly calibrate the DDR via MMDC once the system is up and running (i.e. after exiting DCD and starting the application).

Directly after my boot ROM copied and started the application code, I initialize my console to see what's up, copy the calibration code to IRAM and start execution of the calibration code.

As soon as I set the MMDC MDSCR register bit CON_REQ to 0x1 (config request) and CMD to 0x2 (auto-refresh) (0x8020), the system seems to halt, I can't even poll the CON_ACK bit.

Any ideas what's going on?

Re: System halt during DDR calibration.

VladanJovanovic — Thu, 24 Jan 2013 08:44:49 GMT

Are you sure your code is really in IRAM? Do you have your own setup code with DCD headers or did you modify u-boot?

I believe u-boot will enable MMU unit very early so you need to keep that in mind when accessing memory regions.

i.MX ProcessorsのトピックSystem halt during DDR calibration.

System halt during DDR calibration.

Re: System halt during DDR calibration.