i.MX Processors中的主题 Re: Remapping vector table in the iMX6

Remapping vector table in the iMX6

ogj — Tue, 02 Nov 2021 03:54:54 GMT

I'm having an issue/misunderstanding on remapping the vector table for the A9 core (iMX6 Quad) in a bare metal (flat mapped) application. I assumed I could create a vector table in some arbitrary location in RAM, load that location into the vbar register:

ldr r0, =vector_tbl
mcr p15, 0, r0, c12, c0, 0 //write VBAR register

and when an interrupt occurred (via the gic/IRQ), control would pass to the IRQ handler. This isn't happening. Control actually passes to the svc handler with the cpu in IRQ mode. I'm pretty sure this is a result of not remapping the vector table correctly. Any guidance on this?

Re: Remapping vector table in the iMX6

Zhiming_Liu — Tue, 02 Nov 2021 04:26:54 GMT

The Remapping vector table code in start.S/vectors.S is not written by nxp. You should post this issue in linux kernel site.And this start code shouldn't have errors.

Re: Remapping vector table in the iMX6

ogj — Wed, 10 Nov 2021 04:49:44 GMT

Got the answer from ARM. The vector table must be on a 32-byte boundary.