topic Re: i.MX6 bt656 display interface in i.MX Processors

i.MX6 bt656 display interface

alexandersmirno — Tue, 22 Jan 2013 20:39:17 GMT

Hello everybody,

I have a custom board based on i.MX6 quad core. On this board I have TV encoder connected to DI through bt656 which working in PAL mode. I've wrote a small display driver, but the picture in TV is bad-scaled (i see several instances of the same frame, tile-style) and colors are wrong (the console background is green). As far as I understand, the problem is in data format provided by DI. Unfortunately I haven't found any information how to setup IPU for bt656 output in SoC spec, it only mentions that it's possible. Could anybody help me please?

Re: i.MX6 bt656 display interface

qiang_li-mpu_se — Thu, 07 Feb 2013 02:26:06 GMT

You can get the BT656 output patch from the followed link, it was verified with adv7391 for both PAL and NTSC.

https://community.freescale.com/docs/DOC-94019

Re: i.MX6 bt656 display interface

alexandersmirno — Thu, 07 Feb 2013 05:35:03 GMT

Dear Qiang Li,

thank you a lot for the patches, I've already tested them - everything works!

Just one question.. I use TV encoder in PAL mode, I mapped console to the frame buffer, but I see some text flickering (I don't see this effect for Tux in screen corner and when playing video). Is it a console issue or there is some problem with FB?

Alex

Re: i.MX6 bt656 display interface

qiang_li-mpu_se — Thu, 07 Feb 2013 05:49:38 GMT

Hi Alex, the frame buffer should be OK, I had read back them to verify. By the way, if you are using RGB frame buffer, maybe you can try the followed setting, in "ipu_disp.c", function __ipu_dp_csc_setup(), enable the line for "Y range 16-235, U/V range 16-240". For default code, Y,U,V data will be all 0~255. If it still failed, I think the issue should be caused during digital to analog converting, you need get help from the TV encoder vendor.

if (dp_csc_param.mode >= 0) {

reg = ipu_dp_read(ipu, DP_COM_CONF(dp));

reg &= ~DP_COM_CONF_CSC_DEF_MASK;

reg |= dp_csc_param.mode;

reg |= (1 << 11); /* Y range 16-235, U/V range 16-240. */

ipu_dp_write(ipu, reg, DP_COM_CONF(dp));

}