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    <title>topic Re: imx8m-mini pcie_ref_clk direction in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/imx8m-mini-pcie-ref-clk-direction/m-p/1362205#M182184</link>
    <description>&lt;P&gt;Please note that the mainline i.MX 8M Mini PCIe driver is now on the mailing list for review and I successfully tested it with the PCIe output clock option. Hopefully, this resolves the situation once and for all!&lt;/P&gt;&lt;P&gt;&lt;A href="https://marc.info/?l=linux-arm-kernel&amp;amp;m=163402965306538" target="_blank"&gt;https://marc.info/?l=linux-arm-kernel&amp;amp;m=163402965306538&lt;/A&gt;&lt;/P&gt;</description>
    <pubDate>Wed, 27 Oct 2021 07:32:54 GMT</pubDate>
    <dc:creator>marcelziswiler</dc:creator>
    <dc:date>2021-10-27T07:32:54Z</dc:date>
    <item>
      <title>imx8m-mini pcie_ref_clk direction</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx8m-mini-pcie-ref-clk-direction/m-p/907842#M136842</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Component concerned: IMX8M Mini&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;It is not clear if the PCIe reference clock (ball pin A21 &amp;amp; B21) are able to receive or generate a PCIe clock.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;On the NXP evaluation module schematics a bidir port have been used for these pins, so we can suppose both possibilities exists.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;But, if both possibilities exist, what is the register used to select the input or output mode for the PCIe reference clock.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Moreover, I have not found in the datasheet the full specification of these pins (for input and/or for output mode).&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;If output mode is available, external pull down resistor needed, external serial resistor needed, drive capabilities?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thank you for your help&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 10 May 2019 16:49:10 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx8m-mini-pcie-ref-clk-direction/m-p/907842#M136842</guid>
      <dc:creator>michelcounson</dc:creator>
      <dc:date>2019-05-10T16:49:10Z</dc:date>
    </item>
    <item>
      <title>Re: imx8m-mini pcie_ref_clk direction</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx8m-mini-pcie-ref-clk-direction/m-p/907843#M136843</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P style="margin: 0cm; margin-bottom: .0001pt;"&gt;&lt;SPAN style="font-size: 10.0pt; color: black;"&gt;The&amp;nbsp;General Purpose Register 14 (IOMUXC_GPR_GPR14), contains bits that seems to confirm that the IMX8 Mini is able to receive or generate a PCIe clock.&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="margin: 0cm; margin-bottom: .0001pt;"&gt;&lt;SPAN style="font-size: 10.0pt; color: black;"&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="margin: 0cm; margin-bottom: .0001pt;"&gt;&lt;SPAN style="font-size: 10.0pt; color: black;"&gt;But the behavior of b9, b10, b11 are not perfectly clear&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="margin: 0cm; margin-bottom: .0001pt;"&gt;&lt;SPAN style="font-size: 10.0pt; color: black;"&gt;b11 GPR_PCIE1_CLKREQ_B_OVERRIDE&lt;BR /&gt; b10 GPR_PCIE1_CLKREQ_B_OVERRIDE_EN&lt;BR /&gt; b9 GPR_PCIE1_PHY_I_AUX_EN_OVERRIDE_EN&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="margin: 0cm; margin-bottom: .0001pt;"&gt;&lt;SPAN style="font-size: 10.0pt; color: black;"&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="margin: 0cm; margin-bottom: .0001pt;"&gt;&lt;SPAN style="font-size: 10.0pt; color: black;"&gt;And still nothing found about&amp;nbsp;&lt;SPAN style="background: white;"&gt;&lt;SPAN&gt;full specification of these pins (for input and/or for output mode), external resistor needed...&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 10.0pt; color: black;"&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 10 May 2019 23:12:41 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx8m-mini-pcie-ref-clk-direction/m-p/907843#M136843</guid>
      <dc:creator>michelcounson</dc:creator>
      <dc:date>2019-05-10T23:12:41Z</dc:date>
    </item>
    <item>
      <title>Re: imx8m-mini pcie_ref_clk direction</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx8m-mini-pcie-ref-clk-direction/m-p/907844#M136844</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hell Michel,&lt;/P&gt;&lt;P&gt;&amp;nbsp; See below, please!&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;1. Hardware&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_1.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/80593i1A952683EDCE75F0/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_1.png" alt="pastedImage_1.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;&lt;EM&gt;---Using internal PCIe Clock( CPU output)&lt;/EM&gt;&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;remove R610/R611/R616/R617, populate R614/R615&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;2. software&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;Use arch/arm64/fsl-imx8mm-evk-revb.dts, please!&lt;/P&gt;&lt;P&gt;The dts file supports internal PCIe Reference Clock.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Have a nice day!&lt;/P&gt;&lt;P&gt;BR,&lt;/P&gt;&lt;P&gt;Weidong&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 13 May 2019 04:09:51 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx8m-mini-pcie-ref-clk-direction/m-p/907844#M136844</guid>
      <dc:creator>weidong_sun</dc:creator>
      <dc:date>2019-05-13T04:09:51Z</dc:date>
    </item>
    <item>
      <title>Re: imx8m-mini pcie_ref_clk direction</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx8m-mini-pcie-ref-clk-direction/m-p/907845#M136845</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P style="margin: 0cm; margin-bottom: .0001pt;"&gt;&lt;/P&gt;&lt;P style="margin: 0cm; margin-bottom: .0001pt;"&gt;&lt;SPAN style="font-size: 11.5pt; color: #3d3d3d;"&gt;Thank you for your answer.&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="margin: 0cm; margin-bottom: .0001pt;"&gt;&lt;SPAN style="font-size: 11.5pt; color: #3d3d3d;"&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="margin: 0cm; margin-bottom: .0001pt;"&gt;&lt;SPAN style="font-size: 11.5pt; color: #3d3d3d;"&gt;The PCIe clock output mode probably need external load resistor, so we have probably to populate R621 &amp;amp; R622?&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="margin: 0cm; margin-bottom: .0001pt;"&gt;&lt;SPAN style="font-size: 11.5pt; color: #3d3d3d;"&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="margin: 0cm; margin-bottom: .0001pt;"&gt;&lt;SPAN style="font-size: 11.5pt; color: #3d3d3d;"&gt;I remember that on some IMX6, even if an output mode exists, the recommendation was to use an external PCIe clock generator because the output jitter was too high and not compliant with PCIe specification.&amp;nbsp;Could you confirm that the PCIe clock output mode have been fully qualified on the IMX8M Mini component and that the jitter is compliant with the PCIe gen2 specification?&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="margin: 0cm; margin-bottom: .0001pt;"&gt;&lt;SPAN style="font-size: 11.5pt; color: #3d3d3d;"&gt;Not too much risk to use the PCIe clock output mode?&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="margin: 0cm; margin-bottom: .0001pt;"&gt;&lt;SPAN style="font-size: 11.5pt; color: #3d3d3d;"&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="margin: 0cm; margin-bottom: .0001pt;"&gt;&lt;SPAN style="font-size: 11.5pt; color: #3d3d3d;"&gt;Thank you for your help.&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="margin: 0cm; margin-bottom: .0001pt;"&gt;&lt;/P&gt;&lt;P style="margin: 0cm; margin-bottom: .0001pt;"&gt;&lt;SPAN style="font-size: 11.5pt; color: #3d3d3d;"&gt;Michel&lt;/SPAN&gt;&lt;/P&gt;&lt;P style="margin: 0cm; margin-bottom: .0001pt;"&gt;&lt;SPAN style="font-size: 11.5pt; color: #3d3d3d;"&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 13 May 2019 10:50:27 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx8m-mini-pcie-ref-clk-direction/m-p/907845#M136845</guid>
      <dc:creator>michelcounson</dc:creator>
      <dc:date>2019-05-13T10:50:27Z</dc:date>
    </item>
    <item>
      <title>Re: imx8m-mini pcie_ref_clk direction</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx8m-mini-pcie-ref-clk-direction/m-p/907846#M136846</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Michel,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;1.&lt;SPAN style="font-size: 11.5pt; color: #3d3d3d;"&gt; we have probably to populate R621 &amp;amp; R622?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;R621 &amp;amp; R622 don't affect PCIe' clock output or input.&lt;/P&gt;&lt;P&gt;2. &lt;SPAN style="font-size: 11.5pt; color: #3d3d3d;"&gt;&amp;nbsp;Could you confirm that the PCIe clock output mode have been fully qualified on the IMX8M Mini component and that the jitter is compliant with the PCIe gen2 specification?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 11.5pt; color: #3d3d3d;"&gt;(1) Output mode is no problem. &lt;BR /&gt;A few weeks ago, a German customer and I discussed this issue and successfully used the PCIe clock inside the CPU. No problem. This solution helps customers save costs.&lt;BR /&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 11.5pt; color: #3d3d3d;"&gt;(2) PCIe Gen2 is no problem.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 11.5pt; color: #3d3d3d;"&gt;Below is from i.MX8MM reference manual.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 11.5pt; color: #3d3d3d;"&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_1.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/80988i0D8D8EF3926DFF5A/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_1.png" alt="pastedImage_1.png" /&gt;&lt;/span&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 11.5pt; color: #3d3d3d;"&gt;Hope above information can help you!&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 11.5pt; color: #3d3d3d;"&gt;Have a nice day!&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 11.5pt; color: #3d3d3d;"&gt;BR,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 11.5pt; color: #3d3d3d;"&gt;Weidong&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 14 May 2019 01:43:21 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx8m-mini-pcie-ref-clk-direction/m-p/907846#M136846</guid>
      <dc:creator>weidong_sun</dc:creator>
      <dc:date>2019-05-14T01:43:21Z</dc:date>
    </item>
    <item>
      <title>Re: imx8m-mini pcie_ref_clk direction</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx8m-mini-pcie-ref-clk-direction/m-p/1233136#M169692</link>
      <description>&lt;P&gt;&amp;gt;&amp;nbsp;R621 &amp;amp; R622 don't affect PCIe' clock output or input.&lt;/P&gt;&lt;P&gt;I really don't think this is true. Please have a look here for reference:&lt;/P&gt;&lt;P&gt;&lt;A href="https://community.nxp.com/t5/i-MX-Processors/8M-Mini-PCIe-Clock-Generation-Termination/m-p/1233128/highlight/true#M169688" target="_blank"&gt;https://community.nxp.com/t5/i-MX-Processors/8M-Mini-PCIe-Clock-Generation-Termination/m-p/1233128/highlight/true#M169688&lt;/A&gt;&lt;/P&gt;</description>
      <pubDate>Thu, 18 Feb 2021 21:45:57 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx8m-mini-pcie-ref-clk-direction/m-p/1233136#M169692</guid>
      <dc:creator>marcelziswiler</dc:creator>
      <dc:date>2021-02-18T21:45:57Z</dc:date>
    </item>
    <item>
      <title>Re: imx8m-mini pcie_ref_clk direction</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx8m-mini-pcie-ref-clk-direction/m-p/1355496#M181519</link>
      <description>&lt;P&gt;&lt;SPAN&gt;IMX8QXP also encountered the same problem, want PCIE output 100M clock, which register to set?&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Thu, 14 Oct 2021 03:38:04 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx8m-mini-pcie-ref-clk-direction/m-p/1355496#M181519</guid>
      <dc:creator>yangxu</dc:creator>
      <dc:date>2021-10-14T03:38:04Z</dc:date>
    </item>
    <item>
      <title>Re: imx8m-mini pcie_ref_clk direction</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx8m-mini-pcie-ref-clk-direction/m-p/1362205#M182184</link>
      <description>&lt;P&gt;Please note that the mainline i.MX 8M Mini PCIe driver is now on the mailing list for review and I successfully tested it with the PCIe output clock option. Hopefully, this resolves the situation once and for all!&lt;/P&gt;&lt;P&gt;&lt;A href="https://marc.info/?l=linux-arm-kernel&amp;amp;m=163402965306538" target="_blank"&gt;https://marc.info/?l=linux-arm-kernel&amp;amp;m=163402965306538&lt;/A&gt;&lt;/P&gt;</description>
      <pubDate>Wed, 27 Oct 2021 07:32:54 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx8m-mini-pcie-ref-clk-direction/m-p/1362205#M182184</guid>
      <dc:creator>marcelziswiler</dc:creator>
      <dc:date>2021-10-27T07:32:54Z</dc:date>
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