ESAI receiver channels prioritization FIFO

M_MA — Mon, 25 Oct 2021 12:51:58 GMT

Hi,

Is there a prioritization which receiver channel is enqueuer in the SAI-Receive-FIFO first in case all 4-receiver channels are used in TDM Mode with external input clock?

Is it possible to read the FIFO via DMA without the ASRC Block?

Re: ESAI receiver channels prioritization FIFO

igorpadykov — Wed, 27 Oct 2021 07:02:31 GMT

Hi Michael

>Is there a prioritization which receiver channel is enqueuer in the SAI-Receive-FIFO

>first in case all 4-receiver channels are used in TDM Mode with external input clock?

there is no prioritization. From sect.25.6.2 ESAI Receive Data Register (ESAI_ERDR)
i.MX 6Dual/6Quad Applications Processor Reference Manual

"When multiple ESAI receivers are enabled, the data for each receiver is interleaved from lowest

receiver to highest receiver (for example, if receivers 0, 2 and 3 are enabled then data is returned as follows: receiver #0, receiver #2, receiver #3, receiver #0, receiver #2, receiver #3, receiver #0, etc)."

>Is it possible to read the FIFO via DMA without the ASRC Block?

yes, one can refer to sect.25.4.3 ESAI DMA Requests from the FIFOs.

Best regards
igor

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ESAI receiver channels prioritization FIFO

Re: ESAI receiver channels prioritization FIFO