topic Re: Can't debug iMX when input pin is high in i.MX Processors

Can't debug iMX when input pin is high

Michi_O — Tue, 12 Oct 2021 14:22:27 GMT

Hi,

I have an issue with debugging / accessing the controller with J-Link. GPIO pins are initially set as input pins after a reset (corresponding registers default as 0). Whenever a high signal is applied to one of these GPIOs the J-Link probe fails to connect to the target. In my specific case, one GPIO is later initialized as a CS for SPI communication (slave). Therefore, the device the iMX is communicating with is raising the signal before I can start the debugging process and the probe fails to connect via SWD. If the CS line is cut I can debug as usual.

Is there a way around this behavior? Unfortunately there is no proper way in the given system to keep the CS line low when programming.

I'm using a MIMXRT1052DVL6B and Segger J-Link with MCUXpresso IDE.

Thanks for your support.

Re: Can't debug iMX when input pin is high

kerryzhou — Thu, 14 Oct 2021 08:58:57 GMT

Hi @Michi_O ,

Please tell me which detail pin you use will influence the debugger? Whether it is the JTAG_MOD pin or other SWD related pins?

This pin needs to be low, otherwise, it will influence the debug mode.

Wish it helps you!

Best Regards,

Kerry

Re: Can't debug iMX when input pin is high

Michi_O — Thu, 14 Oct 2021 13:43:51 GMT

Hi Kerry,

thanks for your response. Additionally to my previous findings I figured out that not (only) a high signal on the observed pins is causing the connection issue. It also appears when a pin is simply connected to the rest of the system. Unfortunately, the behavior can't be determined by specific pins. It is completely random and may or may not occur when a certain pin is connected. However, when the controller board is connected to the system with all pins (LPSPI1 - LPSPI4, LPI2C1 and a few GPIOs) the debugger can never connect.

I could see that in such cases the SWDIO and SWDCLK lines change their initial level (sometimes high, sometimes low). I fixed this by applying pull-ups as stated by the table from your previous post. The JTAG_MOD pin was pulled-down by 100k which I also changed to 4.7k as stated in the table. Unfortunately, all measures were unsuccessful.

Regards,

Michael

Re: Can't debug iMX when input pin is high

kerryzhou — Fri, 15 Oct 2021 05:43:33 GMT

Hi @Michi_O ,

Can you do the same test on the NXP official MIMXRT1050-EVKB board? Whether you meet the same issues with your customer board or not?

Seems your hardware have the intereference signal, which influence the SWD. What about your PCB ground, whether it is influenced or not?

Best Regards,

kerry

Re: Can't debug iMX when input pin is high

Michi_O — Tue, 16 Nov 2021 08:19:17 GMT

Hi @kerryzhou ,

sorry for the delayed response and thanks for your help. It turned out that we had an unstable supply voltage at start-up which was obviously causing the issue. With the supply voltage fixed and stable the issue didn't occur anymore.

Thanks for your support.

Kind regards,

Michael

Re: Can't debug iMX when input pin is high

kerryzhou — Tue, 16 Nov 2021 08:23:12 GMT

Hi @Michi_O

Thanks for your information sharing.

Next time, if you have any issues about the RT, please create the question post under this link:

https://community.nxp.com/t5/i-MX-RT/bd-p/imxrt

Wish it helps you!

Best Regards,

Kerry