<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Re: CSI HandShake Interface IMX6UL in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/CSI-HandShake-Interface-IMX6UL/m-p/1355598#M181530</link>
    <description>&lt;P&gt;I need to turn on the CSI handshake interface, not the PXP one&lt;/P&gt;</description>
    <pubDate>Thu, 14 Oct 2021 06:51:47 GMT</pubDate>
    <dc:creator>tortorino</dc:creator>
    <dc:date>2021-10-14T06:51:47Z</dc:date>
    <item>
      <title>CSI HandShake Interface IMX6UL</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/CSI-HandShake-Interface-IMX6UL/m-p/1355088#M181494</link>
      <description>&lt;P&gt;There is a reference to this LCDIF mode in the IMX6UL manual. I want to use it, but I can't figure how to turn it on. There is a register in LCDIF_CTRLn to turn PXP handshake, but no for CSI. AM I missing something? Help me please, and also do I need to allocate the buffer in ocram myself, or it is handled by the hardware, because it's not clear to me also. Btw I have bt656 pal input and bt656 pal output (DVI mode)&lt;/P&gt;</description>
      <pubDate>Wed, 13 Oct 2021 15:24:42 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/CSI-HandShake-Interface-IMX6UL/m-p/1355088#M181494</guid>
      <dc:creator>tortorino</dc:creator>
      <dc:date>2021-10-13T15:24:42Z</dc:date>
    </item>
    <item>
      <title>Re: CSI HandShake Interface IMX6UL</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/CSI-HandShake-Interface-IMX6UL/m-p/1355534#M181525</link>
      <description>&lt;P&gt;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/192334"&gt;@tortorino&lt;/a&gt;&amp;nbsp;&lt;BR /&gt;Hello,&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; The following can help:&lt;/P&gt;
&lt;P&gt;Test codes may be used as example.&lt;/P&gt;
&lt;P&gt;&lt;A href="https://source.codeaurora.org/external/imx/imx-test/tree/test/pxp_lib_test?h=imx_5.4.70_2.3.0" target="_blank"&gt;https://source.codeaurora.org/external/imx/imx-test/tree/test/pxp_lib_test?h=imx_5.4.70_2.3.0&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;"&lt;SPAN class="tm6"&gt;How to enable i.MX6UL CSI port support BT.656 deinterlace mode and PXP preview&lt;/SPAN&gt;"&lt;/P&gt;
&lt;P&gt;&lt;A href="https://community.nxp.com/t5/i-MX-Processors-Knowledge-Base/How-to-enable-i-MX6UL-CSI-port-support-BT-656-deinterlace-mode/ta-p/1110764" target="_blank"&gt;https://community.nxp.com/t5/i-MX-Processors-Knowledge-Base/How-to-enable-i-MX6UL-CSI-port-support-BT-656-deinterlace-mode/ta-p/1110764&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Regards,&lt;BR /&gt;Yuri.&lt;/P&gt;</description>
      <pubDate>Thu, 14 Oct 2021 05:25:46 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/CSI-HandShake-Interface-IMX6UL/m-p/1355534#M181525</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2021-10-14T05:25:46Z</dc:date>
    </item>
    <item>
      <title>Re: CSI HandShake Interface IMX6UL</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/CSI-HandShake-Interface-IMX6UL/m-p/1355598#M181530</link>
      <description>&lt;P&gt;I need to turn on the CSI handshake interface, not the PXP one&lt;/P&gt;</description>
      <pubDate>Thu, 14 Oct 2021 06:51:47 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/CSI-HandShake-Interface-IMX6UL/m-p/1355598#M181530</guid>
      <dc:creator>tortorino</dc:creator>
      <dc:date>2021-10-14T06:51:47Z</dc:date>
    </item>
    <item>
      <title>Re: CSI HandShake Interface IMX6UL</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/CSI-HandShake-Interface-IMX6UL/m-p/1357583#M181745</link>
      <description>&lt;P&gt;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/192334"&gt;@tortorino&lt;/a&gt;&amp;nbsp;&lt;BR /&gt;Hello,&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&amp;nbsp; please refer to section 32.4.9 (CSI HANDSHAKE INTERFACE) of the i.MX 6UL Reference &lt;BR /&gt;Manual (Rev. 2, 03/2017).&lt;/P&gt;
&lt;P&gt;&lt;BR /&gt;&lt;EM&gt;&amp;nbsp;&amp;nbsp; The LCDIF and CSI support a pipeline mode to use double buffers inside OCRAM for&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;the video pass through from CSI to LCDIF, the pipeline buffer size can be 8 line or 16&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;line as configurable. The pipeline will be handle by hardware handshake signals between&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;CSI and LCDIF. The LCDIF will have the capability to synchronize display with CSI&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;based on the VSYNC signal from CSI. When LCDIF is enabled to start display,it can&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;optionally wait for the VSYNC edge from CSI before it starts the display for next&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;frame,The delay from VSYNC input to the start of next frame is programmable by&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;LCDIF_SYNC_DELAY register.&lt;/EM&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;A href="https://www.nxp.com/webapp/Download?colCode=IMX6ULRM" target="_blank"&gt;https://www.nxp.com/webapp/Download?colCode=IMX6ULRM&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Regards,&lt;BR /&gt;Yuri.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Tue, 19 Oct 2021 05:05:43 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/CSI-HandShake-Interface-IMX6UL/m-p/1357583#M181745</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2021-10-19T05:05:43Z</dc:date>
    </item>
  </channel>
</rss>

