i.MX ProcessorsのトピックRe: DCIC IMX6 Solo

DCIC IMX6 Solo

mjrudy — Tue, 14 Sep 2021 19:41:18 GMT

I'm trying to configure the DCIC checking for an IMX6 SOLO. We run a bare metal BSP so I'm basically just trying to setup the registers and get a CRC to output.

I've followed the chapter 20 of the i.MX 6 SOLO/Dual Lite Reference Manual to set the values in the registers to use IPU1 and DCIC 1. I turned on the clock via CG12 register bit. I'm only trying to get 1 ROI to generate a CRC at the moment. The ROI calculated signature register is always 0.

I've tried following the Linux kernel's logic to set this up but can someone tell me what I'm missing?

Steps:

Turn on the Clock.

Mux the GRP10 register to configure DCIC 1 to IPU 1

configure the ROI just using offsets of 10 for x and y with a size of 100 for x and y display is 480x800

Enable the checking and ROI.

I would expect based on the document that is would be seeing come calculated CRC in the register but it is always 0.

Re: DCIC IMX6 Solo

jimmychan — Fri, 24 Sep 2021 13:20:07 GMT

I would suggest you test it on Linux BSP.

For you reference

https://community.nxp.com/t5/i-MX-Processors/i-MX6-DCIC-freeze/m-p/631743

Re: DCIC IMX6 Solo

mjrudy — Fri, 24 Sep 2021 13:34:07 GMT

Thank you for you reply. We wrote a custom kernel for our needs so I'd like to just stick with this to get this working. I've no doubt the DCIC test would work accordingly.

I set the IOMUXC_GPR10 register to HDMI for DCIC1 and things seem to be updating. We are using IPU1 DI0 do you know why this wouldn't work but HDMI would?

Also DCIC chapter mentions 16 ROI's for each DCIC but the register memory map doesn't mention where to set the additional ROI's. Do you know the register locations to set up additional regions?

Thank you,

Micah Rudy