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    <title>i.MX ProcessorsのトピックRe: imx8mp pcie eye pattern test fail</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/imx8mp-pcie-eye-pattern-test-fail/m-p/1345812#M180590</link>
    <description>&lt;P&gt;Hi igor:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thanks.&lt;/P&gt;&lt;P&gt;I have checked the file , there is one parameter using in the file:&amp;nbsp;pcie_cz_enabled=yes,&lt;/P&gt;&lt;P&gt;I can't find it in kernel, could you tell me what's the parameter used for ?&lt;/P&gt;&lt;P&gt;BTW, We have test the EVK board, it passed, any we use the same kernel and config in my board, it fail, the fail is a very little margin, so I want to know what register is relative to the fail ?&lt;/P&gt;</description>
    <pubDate>Fri, 24 Sep 2021 11:02:43 GMT</pubDate>
    <dc:creator>jiangyaqiang</dc:creator>
    <dc:date>2021-09-24T11:02:43Z</dc:date>
    <item>
      <title>imx8mp pcie eye pattern test fail</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx8mp-pcie-eye-pattern-test-fail/m-p/1344924#M180521</link>
      <description>&lt;P&gt;Hi :&lt;/P&gt;&lt;P&gt;My board PCIE eye pattern test fail at something, as bellow:&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="jiangyaqiang_0-1632386510915.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/157030i3D389DAC96004B02/image-size/medium?v=v2&amp;amp;px=400" role="button" title="jiangyaqiang_0-1632386510915.png" alt="jiangyaqiang_0-1632386510915.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;The "low Limit" is a litter too fast.&amp;nbsp;&lt;/P&gt;&lt;P&gt;which register should I tune to pass it ?&lt;/P&gt;&lt;P&gt;I have attachment the complete test report.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Thu, 23 Sep 2021 08:47:01 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx8mp-pcie-eye-pattern-test-fail/m-p/1344924#M180521</guid>
      <dc:creator>jiangyaqiang</dc:creator>
      <dc:date>2021-09-23T08:47:01Z</dc:date>
    </item>
    <item>
      <title>Re: imx8mp pcie eye pattern test fail</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx8mp-pcie-eye-pattern-test-fail/m-p/1345797#M180588</link>
      <description>&lt;P&gt;Hi Yaqiang&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;reason may incorrect testing measurements, may be recommended to recheck them using AN12444&lt;/P&gt;
&lt;P&gt;&lt;A id="relatedDocsClick_7" href="https://www.nxp.com/docs/en/application-note/AN12444.pdf" target="_blank" rel="noopener"&gt;&lt;STRONG&gt;PCIe Certification Guide for i.MX8 Serials&lt;/STRONG&gt;&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;/P&gt;</description>
      <pubDate>Fri, 24 Sep 2021 10:27:11 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx8mp-pcie-eye-pattern-test-fail/m-p/1345797#M180588</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2021-09-24T10:27:11Z</dc:date>
    </item>
    <item>
      <title>Re: imx8mp pcie eye pattern test fail</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/imx8mp-pcie-eye-pattern-test-fail/m-p/1345812#M180590</link>
      <description>&lt;P&gt;Hi igor:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thanks.&lt;/P&gt;&lt;P&gt;I have checked the file , there is one parameter using in the file:&amp;nbsp;pcie_cz_enabled=yes,&lt;/P&gt;&lt;P&gt;I can't find it in kernel, could you tell me what's the parameter used for ?&lt;/P&gt;&lt;P&gt;BTW, We have test the EVK board, it passed, any we use the same kernel and config in my board, it fail, the fail is a very little margin, so I want to know what register is relative to the fail ?&lt;/P&gt;</description>
      <pubDate>Fri, 24 Sep 2021 11:02:43 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/imx8mp-pcie-eye-pattern-test-fail/m-p/1345812#M180590</guid>
      <dc:creator>jiangyaqiang</dc:creator>
      <dc:date>2021-09-24T11:02:43Z</dc:date>
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