i.MX Processors中的主题 Re: IMX8QuadXPlus LPDDR4 CA SWAP in Channel

IMX8QuadXPlus LPDDR4 CA SWAP in Channel

Wenhai_05 — Wed, 22 Sep 2021 02:58:36 GMT

Dear

Could you confirm if there is any restriction of CA(Command & Address) swapping on LPDDR4?

Thanks!

Alex

Re: IMX8QuadXPlus LPDDR4 CA SWAP in Channel

Rita_Wang — Wed, 22 Sep 2021 07:16:24 GMT

As long as it complies with JEDEC specifications，no special. The details design you can refer to our hardware user guide document.

Re: IMX8QuadXPlus LPDDR4 CA SWAP in Channel

Wenhai_05 — Wed, 22 Sep 2021 07:57:40 GMT

Dear

It is not stated in JEDEC specification. I think it depends on the features of DDR PHY and Controller.

As I know, IMX8QXP support data bus swapping. I can fill in my data configuration to get corresponding code. Refer to attachment, which is snapped in worksheet (BoardDataBusConfig) of MX8QXP_C0_B0_LPDDR4_RPA_1.2GHz_V15.xlsx.

Similarly, due to layout, I have the requirement of CA swapping. Such as, DDR_DCF00 is configured to CA2_A, I want to configure it as CA5_A.

There are not these information in user guide .

Thanks!

Alex

Re: IMX8QuadXPlus LPDDR4 CA SWAP in Channel

Rita_Wang — Wed, 22 Sep 2021 09:14:48 GMT

Swapping of the CA lines is not supported.