topic Re: IMX8MM - IOMUXC_SAI2_RXC_UART1_TX on pad AB22 fails. in i.MX Processors

IMX8MM - IOMUXC_SAI2_RXC_UART1_TX on pad AB22 fails.

Noel_V — Tue, 14 Sep 2021 15:17:15 GMT

Hello,

CPU : IMX8MM,

Using/building : linux-imx_4.14.98_2.3.0.

HARDWARE: custom PCB design.

I'm trying to re-route uart1 and uart2 to SAI2 SAI3 pads but for some reason, when trying to configure for example uart1 as below .

pinctrl_uart1: uart1grp {
fsl,pins = <
MX8MM_IOMUXC_SAI2_RXC_UART1_DTE_TX 0x140
MX8MM_IOMUXC_SAI2_RXFS_UART1_DTE_RX 0x140
>;
};

I don't see my tx-bytes at PAD-AB22 it seems as if this is still an RX-pin in stead of a TX-pin of the uart. ( when putting my oscilloscope on PAD-AC19 I see the TX coming out here and not on PAD-AB22.)

For the 2nd uart I can send bytes , but when connecting TX to RX I can't receive my own bytes ( it look is if there is no reception, while to oscilloscope proves that the bytes are arriving on the intended MX8MM_IOMUXC_SAI3_TXFS_UART2_DCE_RX pad)

pinctrl_uart2: uart2grp {
fsl,pins = <
MX8MM_IOMUXC_SAI3_TXC_UART2_DCE_TX 0x140
MX8MM_IOMUXC_SAI3_TXFS_UART2_DCE_RX 0x140
>;
};

Any hints ?

Thanks,

best regards

Re: IMX8MM - IOMUXC_SAI2_RXC_UART1_TX on pad AB22 fails.

igorpadykov — Tue, 14 Sep 2021 23:30:15 GMT

Hi Noel

>.. it seems as if this is still an RX-pin in stead of a TX-pin of the uart

in general this may be due to DCE/DTE described in Figure 16-10. UART external signals to

module signals routing with respect to DCE/DTE mode i.MX 8M Mini Applications Processor Reference Manual

dts example :

https://source.codeaurora.org/external/imx/linux-imx/tree/Documentation/devicetree/bindings/serial/fsl-imx-uart.txt?h=imx_4.14.98_2.3.0

Best regards
igor

Re: IMX8MM - IOMUXC_SAI2_RXC_UART1_TX on pad AB22 fails.

Noel_V — Wed, 15 Sep 2021 11:40:48 GMT

Igor,

You made may day , iow SOLVED !

thanks for the hint !

Best Regards

Noel