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    <title>i.MX ProcessorsのトピックRe: PHY Addressing using 2 PHYs</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/PHY-Addressing-using-2-PHYs/m-p/1338860#M179963</link>
    <description>&lt;P&gt;Hi,&lt;BR /&gt;Thank you for your interest in NXP Semiconductor products and for the opportunity to serve you.&lt;BR /&gt;1) Can I have the PHY hardwired addresses the same eg 1 or do they still have to be different.&lt;BR /&gt;-- According to your statement, you want to use the same MDC and MDIO to access the same registers in both of PHY chips, in my opinion, it's possible to make it, however, I'd highly don't recommend the developer to do that.&lt;BR /&gt;Have a great day,&lt;BR /&gt;TIC&lt;/P&gt;
&lt;P&gt;-------------------------------------------------------------------------------&lt;BR /&gt;Note:&lt;BR /&gt;- If this post answers your question, please click the "Mark Correct" button. Thank you!&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;- We are following threads for 7 weeks after the last post, later replies are ignored&lt;BR /&gt;Please open a new thread and refer to the closed one, if you have a related question at a later point in time.&lt;BR /&gt;-------------------------------------------------------------------------------&lt;/P&gt;</description>
    <pubDate>Mon, 13 Sep 2021 06:17:48 GMT</pubDate>
    <dc:creator>jeremyzhou</dc:creator>
    <dc:date>2021-09-13T06:17:48Z</dc:date>
    <item>
      <title>PHY Addressing using 2 PHYs</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/PHY-Addressing-using-2-PHYs/m-p/1338673#M179940</link>
      <description>&lt;P&gt;I am building a design around an MIMXRT 1062 using both MACs with 2 external PHYs.&amp;nbsp; Since each MAC module has separate MDIO and MDC signals, can I have the PHY hardwired addresses the same eg 1 or do they still have to be different.&lt;/P&gt;</description>
      <pubDate>Sun, 12 Sep 2021 21:52:33 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/PHY-Addressing-using-2-PHYs/m-p/1338673#M179940</guid>
      <dc:creator>jautry</dc:creator>
      <dc:date>2021-09-12T21:52:33Z</dc:date>
    </item>
    <item>
      <title>Re: PHY Addressing using 2 PHYs</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/PHY-Addressing-using-2-PHYs/m-p/1338860#M179963</link>
      <description>&lt;P&gt;Hi,&lt;BR /&gt;Thank you for your interest in NXP Semiconductor products and for the opportunity to serve you.&lt;BR /&gt;1) Can I have the PHY hardwired addresses the same eg 1 or do they still have to be different.&lt;BR /&gt;-- According to your statement, you want to use the same MDC and MDIO to access the same registers in both of PHY chips, in my opinion, it's possible to make it, however, I'd highly don't recommend the developer to do that.&lt;BR /&gt;Have a great day,&lt;BR /&gt;TIC&lt;/P&gt;
&lt;P&gt;-------------------------------------------------------------------------------&lt;BR /&gt;Note:&lt;BR /&gt;- If this post answers your question, please click the "Mark Correct" button. Thank you!&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;- We are following threads for 7 weeks after the last post, later replies are ignored&lt;BR /&gt;Please open a new thread and refer to the closed one, if you have a related question at a later point in time.&lt;BR /&gt;-------------------------------------------------------------------------------&lt;/P&gt;</description>
      <pubDate>Mon, 13 Sep 2021 06:17:48 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/PHY-Addressing-using-2-PHYs/m-p/1338860#M179963</guid>
      <dc:creator>jeremyzhou</dc:creator>
      <dc:date>2021-09-13T06:17:48Z</dc:date>
    </item>
    <item>
      <title>Re: PHY Addressing using 2 PHYs</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/PHY-Addressing-using-2-PHYs/m-p/1339133#M179993</link>
      <description>&lt;P&gt;I think the question was misunderstood.&amp;nbsp; I am using the separate MDIO and MDC signals provided by the 1062.&amp;nbsp; The 2 phys have their own hardwired addresses.&amp;nbsp; Can these addresses by hardwired the same if using the separate MDIO and MDC signals.&lt;/P&gt;</description>
      <pubDate>Mon, 13 Sep 2021 11:47:28 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/PHY-Addressing-using-2-PHYs/m-p/1339133#M179993</guid>
      <dc:creator>jautry</dc:creator>
      <dc:date>2021-09-13T11:47:28Z</dc:date>
    </item>
    <item>
      <title>Re: PHY Addressing using 2 PHYs</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/PHY-Addressing-using-2-PHYs/m-p/1339375#M180013</link>
      <description>&lt;P&gt;Hi,&lt;BR /&gt;Thanks for your reply and clarfication.&lt;BR /&gt;1) Can these addresses by hardwired the same if using the separate MDIO and MDC signals.&lt;BR /&gt;-- Yes.&lt;/P&gt;
&lt;P&gt;Have a great day,&lt;BR /&gt;TIC&lt;/P&gt;
&lt;P&gt;-------------------------------------------------------------------------------&lt;BR /&gt;Note:&lt;BR /&gt;- If this post answers your question, please click the "Mark Correct" button. Thank you!&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;- We are following threads for 7 weeks after the last post, later replies are ignored&lt;BR /&gt;Please open a new thread and refer to the closed one, if you have a related question at a later point in time.&lt;BR /&gt;-------------------------------------------------------------------------------&lt;/P&gt;</description>
      <pubDate>Tue, 14 Sep 2021 02:04:46 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/PHY-Addressing-using-2-PHYs/m-p/1339375#M180013</guid>
      <dc:creator>jeremyzhou</dc:creator>
      <dc:date>2021-09-14T02:04:46Z</dc:date>
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