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    <title>i.MX ProcessorsのトピックRe: SDMA only 32 bits addressing?</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/SDMA-only-32-bits-addressing/m-p/1336056#M179680</link>
    <description>&lt;P&gt;Hi Niklas&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;sorry not possibe, in particular access above 4GB is described in sect.2.1.2 Cortex-A53 Memory Map&lt;/P&gt;
&lt;P&gt;as "Quad-A53 only"&lt;/P&gt;
&lt;P&gt;&lt;A id="relatedDocsClick_3" href="https://www.nxp.com/webapp/Download?colCode=IMX8MDQLQRM" target="_blank" rel="noopener"&gt;&lt;STRONG&gt;i.MX 8M Dual/8M QuadLite/8M Quad Applications Processors Reference Manual&lt;/STRONG&gt;&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;/P&gt;</description>
    <pubDate>Tue, 07 Sep 2021 11:13:24 GMT</pubDate>
    <dc:creator>igorpadykov</dc:creator>
    <dc:date>2021-09-07T11:13:24Z</dc:date>
    <item>
      <title>SDMA only 32 bits addressing?</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/SDMA-only-32-bits-addressing/m-p/1335866#M179664</link>
      <description>&lt;P&gt;Is there some possibility/solution for using SDMA engine for data transfer to memory address &amp;gt; 4GB?&lt;/P&gt;</description>
      <pubDate>Tue, 07 Sep 2021 07:02:33 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/SDMA-only-32-bits-addressing/m-p/1335866#M179664</guid>
      <dc:creator>niklasbergdahl</dc:creator>
      <dc:date>2021-09-07T07:02:33Z</dc:date>
    </item>
    <item>
      <title>Re: SDMA only 32 bits addressing?</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/SDMA-only-32-bits-addressing/m-p/1336056#M179680</link>
      <description>&lt;P&gt;Hi Niklas&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;sorry not possibe, in particular access above 4GB is described in sect.2.1.2 Cortex-A53 Memory Map&lt;/P&gt;
&lt;P&gt;as "Quad-A53 only"&lt;/P&gt;
&lt;P&gt;&lt;A id="relatedDocsClick_3" href="https://www.nxp.com/webapp/Download?colCode=IMX8MDQLQRM" target="_blank" rel="noopener"&gt;&lt;STRONG&gt;i.MX 8M Dual/8M QuadLite/8M Quad Applications Processors Reference Manual&lt;/STRONG&gt;&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;/P&gt;</description>
      <pubDate>Tue, 07 Sep 2021 11:13:24 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/SDMA-only-32-bits-addressing/m-p/1336056#M179680</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2021-09-07T11:13:24Z</dc:date>
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