RT1021: Problems accessing flash using the AHB bus feature.

rshipman — Fri, 03 Sep 2021 13:59:46 GMT

Hi,

I am having some trouble getting the AHB bus flash read/write feature to work reliably.

Question 1:

In the NXP posting:

https://community.nxp.com/t5/i-MX-RT/Can-we-use-a-XIP-flash-and-a-data-flash-at-the-same-FlexSPI/m-p/1033448

The following sentence is in the reply marked as the solution:

"Yes, you can use A1 to XIP while use B1 to save data. XIP use AHB bus. Program use IPS bus."

Does that mean you can only program flash using the IPS bus and therefore cannot use the AHB bus?

In other words, for the RT1021, is writing to flash not available over the AHB bus and you have to send the page program commands via FlexSPI directly? Note that I have erased the flash before trying this.

Question 2:

I have noticed that reading from flash using the AHB Bus seems to only work reliably if I set it up with an SPI read command. If I use a QSPI read command it reads back incorrectly. I can confirm the data is correct using the FlexSPI api directly. This is with both caches disabled.

Is the AHB feature only expected to work with SPI commands not QSPI ones?

Many thanks for your help.

Kind regards,

Ronnie

Re: RT1021: Problems accessing flash using the AHB bus feature.

jeremyzhou — Mon, 06 Sep 2021 06:35:25 GMT

Hi,
Thank you for your interest in NXP Semiconductor products and for the opportunity to serve you.
1) Is writing to flash not available over the AHB bus and you have to send the page program commands via FlexSPI directly? Note that I have erased the flash before trying this.
-- Yes, I'd like to suggest the customer use the IPC commands to read or write the QSPI flash that is used for the data storage function.
2) Is the AHB feature only expected to work with SPI commands not QSPI ones?
-- No, I don't think so.
Have a great day,
TIC

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topic Re: RT1021: Problems accessing flash using the AHB bus feature. in i.MX Processors

RT1021: Problems accessing flash using the AHB bus feature.

Re: RT1021: Problems accessing flash using the AHB bus feature.