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    <title>i.MX Processors中的主题 Re: How to determine the reset reason?</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/How-to-determine-the-reset-reason/m-p/1330241#M179145</link>
    <description>&lt;DIV&gt;Address: 20D_8000h base + 8h offset = 20D_8008h&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;A href="https://www.nxp.com/webapp/Download?colCode=IMX6SDLRM" target="_blank" rel="noopener noreferrer"&gt;https://www.nxp.com/webapp/Download?colCode=IMX6SDLRM&lt;/A&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;STRONG&gt;pag: 5039 - 5040&amp;nbsp;&lt;SPAN&gt;60.7.3 SRC Reset Status Register (SRC_SRSR)&lt;/SPAN&gt;&lt;/STRONG&gt;&lt;/DIV&gt;</description>
    <pubDate>Thu, 26 Aug 2021 09:23:58 GMT</pubDate>
    <dc:creator>albe_merciai</dc:creator>
    <dc:date>2021-08-26T09:23:58Z</dc:date>
    <item>
      <title>How to determine the reset reason?</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/How-to-determine-the-reset-reason/m-p/1330128#M179132</link>
      <description>&lt;P&gt;Hello,&lt;BR /&gt;&lt;BR /&gt;How can I determine the reset reason of an i.mx6 dual processor using a custom hardware?&lt;BR /&gt;&lt;BR /&gt;I found the following code in uboot:&lt;BR /&gt;&lt;BR /&gt;&lt;/P&gt;&lt;LI-CODE lang="c"&gt;static char *get_reset_cause(void)
{
	u32 cause;
	struct src *src_regs = (struct src *)SRC_BASE_ADDR;

	cause = readl(&amp;amp;src_regs-&amp;gt;srsr);
	reset_cause = cause;

	switch (cause) {
	case 0x00001:
	case 0x00011:
		return "POR";
	case 0x00004:
		return "CSU";
	case 0x00008:
		return "IPP USER";
	case 0x00010:
		return "WDOG";
	case 0x00020:
		return "JTAG HIGH-Z";
	case 0x00040:
		return "JTAG SW";
	case 0x00080:
		return "WDOG3";
	case 0x00100:
		return "TEMPSENSE";
	case 0x10000:
		return "WARM BOOT";
	default:
		return "unknown reset";
	}
}&lt;/LI-CODE&gt;&lt;P&gt;But which register is accessed? Is this register documented in any data sheet? Is it accessible also from Linux? What is the meaning of "CSU", "IPP_USER", "JTAG HIGH-Z", "JTAG SW" and "WDOG3"?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Thu, 26 Aug 2021 07:49:13 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/How-to-determine-the-reset-reason/m-p/1330128#M179132</guid>
      <dc:creator>ufechner</dc:creator>
      <dc:date>2021-08-26T07:49:13Z</dc:date>
    </item>
    <item>
      <title>Re: How to determine the reset reason?</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/How-to-determine-the-reset-reason/m-p/1330241#M179145</link>
      <description>&lt;DIV&gt;Address: 20D_8000h base + 8h offset = 20D_8008h&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;A href="https://www.nxp.com/webapp/Download?colCode=IMX6SDLRM" target="_blank" rel="noopener noreferrer"&gt;https://www.nxp.com/webapp/Download?colCode=IMX6SDLRM&lt;/A&gt;&lt;/DIV&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV&gt;&lt;STRONG&gt;pag: 5039 - 5040&amp;nbsp;&lt;SPAN&gt;60.7.3 SRC Reset Status Register (SRC_SRSR)&lt;/SPAN&gt;&lt;/STRONG&gt;&lt;/DIV&gt;</description>
      <pubDate>Thu, 26 Aug 2021 09:23:58 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/How-to-determine-the-reset-reason/m-p/1330241#M179145</guid>
      <dc:creator>albe_merciai</dc:creator>
      <dc:date>2021-08-26T09:23:58Z</dc:date>
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