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    <title>topic Re: BT656 output on ADV7391 using imx6 quad in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/BT656-output-on-ADV7391-using-imx6-quad/m-p/232930#M17913</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;&lt;P&gt;Hi, is there anything in the diffs that has caught your attention?&lt;/P&gt;&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 06 Mar 2014 05:09:51 GMT</pubDate>
    <dc:creator>meflo</dc:creator>
    <dc:date>2014-03-06T05:09:51Z</dc:date>
    <item>
      <title>BT656 output on ADV7391 using imx6 quad</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/BT656-output-on-ADV7391-using-imx6-quad/m-p/232918#M17901</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;I am trying to use the adv7391 encoder to output using cvbs with am imx6 quad board. I am using the patches from &lt;A _jive_internal="true" href="https://community.nxp.com/docs/DOC-94019"&gt;https://community.freescale.com/docs/DOC-94019&lt;/A&gt; (specifically the patch &lt;SPAN style="color: #000000; font-family: 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; font-size: 12px; background-color: #fdfdfd;"&gt;L3.0.35_4.1.0_GA_bt656_output_patch_2013-09-30.zip&lt;/SPAN&gt; which seems to be the latest). The encoder is setup on IPU number 2 and Display 0.&lt;/P&gt;&lt;P&gt;The scenario is with ldb and cvbs output on a monitor connected to the encoder.&lt;/P&gt;&lt;P&gt;When android boots up, I get the normal image on the ldb and on the cvbs output I get the same image but with flickering scrambled image, greenish. So really bad coloring etc.&lt;/P&gt;&lt;P&gt;When I try to use mxc_v4l2_output, I get the following warnings:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;imx-ipuv3 imx-ipuv3.1: IPU Warning - IPU_INT_STAT_5 = 0x00800000&lt;/P&gt;&lt;P&gt;imx-ipuv3 imx-ipuv3.1: IPU Warning - IPU_INT_STAT_10 = 0x00080000&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The uboot related line is:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;video=mxcfb0:dev=adv739x,BT656-NTSC,if=BT656,fbpix=UYVY16 video=mxcfb1:dev=ldb,800x480M@60,if=RGB24,bpp=32 video=mxcfb2:off&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Any suggestion is welcome.&lt;/P&gt;&lt;P&gt;Thanks!&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 13 Feb 2014 17:18:38 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/BT656-output-on-ADV7391-using-imx6-quad/m-p/232918#M17901</guid>
      <dc:creator>meflo</dc:creator>
      <dc:date>2014-02-13T17:18:38Z</dc:date>
    </item>
    <item>
      <title>Re: BT656 output on ADV7391 using imx6 quad</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/BT656-output-on-ADV7391-using-imx6-quad/m-p/232919#M17902</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;When you see the followed errors, it means the IPU display had run into wrong status. How about the test result if you only enable the adv739x display? "video=mxcfb0:dev=adv739x,BT656-NTSC,if=BT656,fbpix=UYVY16 video=mxcfb1:off video=mxcfb2:off"&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;imx-ipuv3 imx-ipuv3.1: IPU Warning - IPU_INT_STAT_5 = 0x00800000&lt;/P&gt;&lt;P&gt;imx-ipuv3 imx-ipuv3.1: IPU Warning - IPU_INT_STAT_10 = 0x00080000&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 14 Feb 2014 03:33:21 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/BT656-output-on-ADV7391-using-imx6-quad/m-p/232919#M17902</guid>
      <dc:creator>qiang_li-mpu_se</dc:creator>
      <dc:date>2014-02-14T03:33:21Z</dc:date>
    </item>
    <item>
      <title>Re: BT656 output on ADV7391 using imx6 quad</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/BT656-output-on-ADV7391-using-imx6-quad/m-p/232920#M17903</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;if I enable only the adv739x display I get the same kind of output on my monitor as in the video. So no change.&lt;/P&gt;&lt;P&gt;Is there anything in addition I should keep in mind in my setup considering I am trying to use it on IPU2 DI0 rather than the case you tested it (IPU1 DI0)?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank you.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 14 Feb 2014 04:52:25 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/BT656-output-on-ADV7391-using-imx6-quad/m-p/232920#M17903</guid>
      <dc:creator>meflo</dc:creator>
      <dc:date>2014-02-14T04:52:25Z</dc:date>
    </item>
    <item>
      <title>Re: BT656 output on ADV7391 using imx6 quad</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/BT656-output-on-ADV7391-using-imx6-quad/m-p/232921#M17904</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;In order to identify the IPU1 and IPU2 related issue, I think you can change the adv739x driver to IPU1, although there will no display on adv739x, but you can run the test from command line mode. Will you still get the followed errors?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;imx-ipuv3 imx-ipuv3.1: IPU Warning - IPU_INT_STAT_5 = 0x00800000&lt;/P&gt;&lt;P&gt;imx-ipuv3 imx-ipuv3.1: IPU Warning - IPU_INT_STAT_10 = 0x00080000&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 14 Feb 2014 05:02:15 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/BT656-output-on-ADV7391-using-imx6-quad/m-p/232921#M17904</guid>
      <dc:creator>qiang_li-mpu_se</dc:creator>
      <dc:date>2014-02-14T05:02:15Z</dc:date>
    </item>
    <item>
      <title>Re: BT656 output on ADV7391 using imx6 quad</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/BT656-output-on-ADV7391-using-imx6-quad/m-p/232922#M17905</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;By the way, did you measure the pixel clock output from iMX6?&lt;/P&gt;&lt;P&gt;When you change adv739x from IPU1 to IPU2, the clock.c should also be modified&lt;/P&gt;&lt;P&gt;From&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt; clk_set_parent(&amp;amp;ipu1_di_clk[0], &amp;amp;pll3_pfd_540M);&amp;nbsp; //for CVBS 27MHz clock&amp;nbsp; &lt;/P&gt;&lt;P&gt; clk_set_parent(&amp;amp;ipu1_di_clk[1], &amp;amp;pll5_video_main_clk);&lt;/P&gt;&lt;P&gt; clk_set_parent(&amp;amp;ipu2_di_clk[0], &amp;amp;pll5_video_main_clk);&lt;/P&gt;&lt;P&gt; clk_set_parent(&amp;amp;ipu2_di_clk[1], &amp;amp;pll5_video_main_clk);&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;To&lt;/P&gt;&lt;P&gt;&lt;BR /&gt; &lt;/P&gt;&lt;P&gt; clk_set_parent(&amp;amp;ipu1_di_clk[0], &amp;amp;pll5_video_main_clk);&lt;/P&gt;&lt;P&gt; clk_set_parent(&amp;amp;ipu1_di_clk[1], &amp;amp;pll5_video_main_clk);&lt;/P&gt;&lt;P&gt; clk_set_parent(&amp;amp;ipu2_di_clk[0], &amp;amp;pll3_pfd_540M);&amp;nbsp; //for CVBS 27MHz clock&amp;nbsp; &lt;/P&gt;&lt;P&gt; clk_set_parent(&amp;amp;ipu2_di_clk[1], &amp;amp;pll5_video_main_clk);&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 14 Feb 2014 05:04:53 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/BT656-output-on-ADV7391-using-imx6-quad/m-p/232922#M17905</guid>
      <dc:creator>qiang_li-mpu_se</dc:creator>
      <dc:date>2014-02-14T05:04:53Z</dc:date>
    </item>
    <item>
      <title>Re: BT656 output on ADV7391 using imx6 quad</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/BT656-output-on-ADV7391-using-imx6-quad/m-p/232923#M17906</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I had the clock.c changes done already. That did not help.&lt;/P&gt;&lt;P&gt;So the IPU2 related changes that I did were in this clock.c file and in my board machine file, where I changed the .ipu_id from 0 to 1. Guess those should be all IPU related changes I needed to do.&lt;/P&gt;&lt;P&gt;As for verifying the pixel clock output from imx, I tested that by I2C getting the adv encoder to do a self test with a color bar test pattern which rendered well on my external CVBS monitor. So clock seems to be okay.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 14 Feb 2014 05:19:36 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/BT656-output-on-ADV7391-using-imx6-quad/m-p/232923#M17906</guid>
      <dc:creator>meflo</dc:creator>
      <dc:date>2014-02-14T05:19:36Z</dc:date>
    </item>
    <item>
      <title>Re: BT656 output on ADV7391 using imx6 quad</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/BT656-output-on-ADV7391-using-imx6-quad/m-p/232924#M17907</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;If you change the adv739x driver to IPU1, of cource there will be no display on adv739x. Will you still get the followed errors?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;imx-ipuv3 imx-ipuv3.1: IPU Warning - IPU_INT_STAT_5 = 0x00800000&lt;BR /&gt;imx-ipuv3 imx-ipuv3.1: IPU Warning - IPU_INT_STAT_10 = 0x00080000&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Do you only see such error when put adv739x to IPU2?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 14 Feb 2014 05:26:46 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/BT656-output-on-ADV7391-using-imx6-quad/m-p/232924#M17907</guid>
      <dc:creator>qiang_li-mpu_se</dc:creator>
      <dc:date>2014-02-14T05:26:46Z</dc:date>
    </item>
    <item>
      <title>Re: BT656 output on ADV7391 using imx6 quad</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/BT656-output-on-ADV7391-using-imx6-quad/m-p/232925#M17908</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Yes, just tested that and I get those errors a lot.&lt;/P&gt;&lt;P&gt;When adv is set on IPU2 I get those warnings 2 times each only, but now that I changed it to IPU1 my ring buffer is full of those errors.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 14 Feb 2014 05:32:04 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/BT656-output-on-ADV7391-using-imx6-quad/m-p/232925#M17908</guid>
      <dc:creator>meflo</dc:creator>
      <dc:date>2014-02-14T05:32:04Z</dc:date>
    </item>
    <item>
      <title>Re: BT656 output on ADV7391 using imx6 quad</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/BT656-output-on-ADV7391-using-imx6-quad/m-p/232926#M17909</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;If so, I think the issue should be related with your patch porting. When you see such error, that means the IPU IDMAC is run in error, so the display will be wrong too.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 14 Feb 2014 05:41:08 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/BT656-output-on-ADV7391-using-imx6-quad/m-p/232926#M17909</guid>
      <dc:creator>qiang_li-mpu_se</dc:creator>
      <dc:date>2014-02-14T05:41:08Z</dc:date>
    </item>
    <item>
      <title>Re: BT656 output on ADV7391 using imx6 quad</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/BT656-output-on-ADV7391-using-imx6-quad/m-p/232927#M17910</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;In the patch's Readme file, you said this:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;3) When bt656 interface is the second display for each IPU,1-layer-fb (it can be checked with command^M&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; "$ cat /sys/class/graphics/fbx/fsl_disp_property"), the frame buffer can only be YUV format. In this^M&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; case, the IPU DC channel was used for BT656 display, it has no CSC function, so RGB frame buffer was^M&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; not supported.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I actually use DI0, so the first interface of IPU2, and can only use fbpix UYVY16. According to the above sentence from the Readme, I should be able to use RGB565 or BGR32 since I am not on DI1, but if I use those I do not get any kind of signal on my monitor.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;# cat /sys/class/graphics/fb0/fsl_disp_dev_property&lt;/P&gt;&lt;P&gt;adv739x&lt;/P&gt;&lt;P&gt;# cat /sys/class/graphics/fb0/mode&lt;/P&gt;&lt;P&gt;D:720x480i-60&lt;/P&gt;&lt;P&gt;# cat /sys/class/graphics/fb0/fsl_disp_property&lt;/P&gt;&lt;P&gt;2-layer-fb-bg&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 20 Feb 2014 06:29:10 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/BT656-output-on-ADV7391-using-imx6-quad/m-p/232927#M17910</guid>
      <dc:creator>meflo</dc:creator>
      <dc:date>2014-02-20T06:29:10Z</dc:date>
    </item>
    <item>
      <title>Re: BT656 output on ADV7391 using imx6 quad</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/BT656-output-on-ADV7391-using-imx6-quad/m-p/232928#M17911</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I haven't got the issue like you said, maybe you can attach your modified source code files here, I can help to have a check.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 28 Feb 2014 09:05:47 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/BT656-output-on-ADV7391-using-imx6-quad/m-p/232928#M17911</guid>
      <dc:creator>qiang_li-mpu_se</dc:creator>
      <dc:date>2014-02-28T09:05:47Z</dc:date>
    </item>
    <item>
      <title>Re: BT656 output on ADV7391 using imx6 quad</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/BT656-output-on-ADV7391-using-imx6-quad/m-p/232929#M17912</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;I am attaching the diff's between the patches you posted and the patches I had done.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank you.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 03 Mar 2014 09:52:08 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/BT656-output-on-ADV7391-using-imx6-quad/m-p/232929#M17912</guid>
      <dc:creator>meflo</dc:creator>
      <dc:date>2014-03-03T09:52:08Z</dc:date>
    </item>
    <item>
      <title>Re: BT656 output on ADV7391 using imx6 quad</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/BT656-output-on-ADV7391-using-imx6-quad/m-p/232930#M17913</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;&lt;P&gt;Hi, is there anything in the diffs that has caught your attention?&lt;/P&gt;&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 06 Mar 2014 05:09:51 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/BT656-output-on-ADV7391-using-imx6-quad/m-p/232930#M17913</guid>
      <dc:creator>meflo</dc:creator>
      <dc:date>2014-03-06T05:09:51Z</dc:date>
    </item>
    <item>
      <title>Re: BT656 output on ADV7391 using imx6 quad</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/BT656-output-on-ADV7391-using-imx6-quad/m-p/232931#M17914</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Your diff mode patch based on my patch is really hard to read, can you generate a patch based your last code and the code after applied my original patch?&lt;/P&gt;&lt;P&gt;By the way, if you are using Android, fbpix=UYVY16 was not supported, Android can only support RGB framebuffer.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 07 Mar 2014 05:13:30 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/BT656-output-on-ADV7391-using-imx6-quad/m-p/232931#M17914</guid>
      <dc:creator>qiang_li-mpu_se</dc:creator>
      <dc:date>2014-03-07T05:13:30Z</dc:date>
    </item>
    <item>
      <title>Re: BT656 output on ADV7391 using imx6 quad</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/BT656-output-on-ADV7391-using-imx6-quad/m-p/232932#M17915</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;The problem is that your patch did not cleanly apply to our code. That is why I needed to create another set of patches based on yours. The attached diff just shows how my patch differs from yours, because of the changes I had to do with our code.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;And yes, I am using Android, but any other fb pixel format beside UYVY16 just don't seem to send any signal to the external monitor. No IPU WARNINGS though, but no signal either.&lt;/P&gt;&lt;P&gt;And by the way, even if using UYVY16, and assign LDB to fb0 and the adv on fb1, the kernel freezes when probing the encoder.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 07 Mar 2014 06:40:24 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/BT656-output-on-ADV7391-using-imx6-quad/m-p/232932#M17915</guid>
      <dc:creator>meflo</dc:creator>
      <dc:date>2014-03-07T06:40:24Z</dc:date>
    </item>
    <item>
      <title>Re: BT656 output on ADV7391 using imx6 quad</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/BT656-output-on-ADV7391-using-imx6-quad/m-p/232933#M17916</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Attached are the patches.&lt;/P&gt;&lt;P&gt;Thank you.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 07 Mar 2014 08:06:11 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/BT656-output-on-ADV7391-using-imx6-quad/m-p/232933#M17916</guid>
      <dc:creator>meflo</dc:creator>
      <dc:date>2014-03-07T08:06:11Z</dc:date>
    </item>
    <item>
      <title>Re: BT656 output on ADV7391 using imx6 quad</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/BT656-output-on-ADV7391-using-imx6-quad/m-p/232934#M17917</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I can't find issue from these patch files.&lt;/P&gt;&lt;P&gt;Can you attach your kernel boot up log? How do you test v4l2 output driver in Android?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 07 Mar 2014 10:20:13 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/BT656-output-on-ADV7391-using-imx6-quad/m-p/232934#M17917</guid>
      <dc:creator>qiang_li-mpu_se</dc:creator>
      <dc:date>2014-03-07T10:20:13Z</dc:date>
    </item>
    <item>
      <title>Re: BT656 output on ADV7391 using imx6 quad</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/BT656-output-on-ADV7391-using-imx6-quad/m-p/232935#M17918</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I am attaching the dmesg for 3 cases; I am anyway attaching the UYVY16 case in case it helps in any way. Also, in the dmesg_RGB565_ldb_on_fb0 you will notice how the kernel hangs when ldb is on mxcfb0 and the adv on mxcfb1.&lt;/P&gt;&lt;P&gt;As for testing, in the case it actually boots, that is adv on mxcfb0 and ldb on mxcfb1, the ldb is mirrored on the screen. In the UYVY16 case the external monitor gets a signal from the adv, as seen in the attached video at the beginning of this thread. In the RGB565 case, there is no signal at all.&lt;/P&gt;&lt;P&gt;In addition, I tried using the mxc_v4l2_output binary to display some video captured using mxc_v4l2_tvin from a adv7180, but same as the above, with UYVY16 the image is scrambled, flickery, greenish, just like in the video; using RGB565, the monitor has no signal.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank you for your support.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 07 Mar 2014 14:31:59 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/BT656-output-on-ADV7391-using-imx6-quad/m-p/232935#M17918</guid>
      <dc:creator>meflo</dc:creator>
      <dc:date>2014-03-07T14:31:59Z</dc:date>
    </item>
    <item>
      <title>Re: BT656 output on ADV7391 using imx6 quad</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/BT656-output-on-ADV7391-using-imx6-quad/m-p/232936#M17919</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;When there is error messages "IPU_INT_STAT_5 = 0x00800000", that means IPU is not working correctly, the BT656 ouput will flick.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;For Android, I think the followed two video modes should be work:&lt;/P&gt;&lt;P&gt;video=mxcfb0:dev=adv739x,BT656-NTSC,if=BT656,fbpix=RGB565 video=mxcfb1:dev=ldb,800x480M@60,if=RGB24,bpp=32&lt;/P&gt;&lt;P&gt;video=mxcfb0:dev=ldb,800x480M@60,if=RGB24,bpp=32 video=mxcfb1:dev=adv739x,BT656-NTSC,if=BT656,fbpix=RGB565&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Can you attach the followed soucre code files:&lt;/P&gt;&lt;P&gt;arch\arm\mach-mx6\clock.c&lt;BR /&gt;arch/arm/mach-mx6/my_imx6q_board.c&lt;/P&gt;&lt;P&gt;drivers/mxc/ipu3/ipu_disp.c&lt;/P&gt;&lt;P&gt;drivers/video/mxc/mxc_ipuv3_fb.c&lt;/P&gt;&lt;P&gt;drivers/video/mxc/mxcfb_adv739x.c&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 10 Mar 2014 02:25:08 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/BT656-output-on-ADV7391-using-imx6-quad/m-p/232936#M17919</guid>
      <dc:creator>qiang_li-mpu_se</dc:creator>
      <dc:date>2014-03-10T02:25:08Z</dc:date>
    </item>
    <item>
      <title>Re: BT656 output on ADV7391 using imx6 quad</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/BT656-output-on-ADV7391-using-imx6-quad/m-p/232937#M17920</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Qiang, by any chance did you try with the data pins on DI0 to DI7?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 10 Mar 2014 09:05:44 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/BT656-output-on-ADV7391-using-imx6-quad/m-p/232937#M17920</guid>
      <dc:creator>meflo</dc:creator>
      <dc:date>2014-03-10T09:05:44Z</dc:date>
    </item>
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