i.MX Processors中的主题 IMX8MM with AR8035 issues.

IMX8MM with AR8035 issues.

mikechw — Tue, 24 Aug 2021 03:30:26 GMT

Hi,

We are using AR8035 with IMX8MM ddr4.

We modified the dts changed the phy address to 4:

&fec1 {
  pinctrl-names = "default";
  pinctrl-0 = <&pinctrl_fec1>;
  phy-mode = "rgmii-id";
  phy-handle = <&ethphy0>;
  fsl,magic-packet;
  status = "okay";

  mdio {
     #address-cells = <1>;
     #size-cells = <0>;

     ethphy0: ethernet-phy@0 {
        compatible = "ethernet-phy-ieee802.3-c22";
        reg = <4>;
        at803x,eee-disabled;
        at803x,vddio-1p8v;
     };
  };
};

but on boot up, log:

switch to partitions #0, OK
mmc1 is current device
flash target is MMC:1
Net: Could not get PHY for FEC0: addr 4
Could not get PHY for FEC0: addr 4
No ethernet found.

Probing at the MDC line, it seems IMX8MM only output clock when it try to find the phy and then it stopped.

Thanks.

Re: IMX8MM with AR8035 issues.

igorpadykov — Tue, 24 Aug 2021 05:51:56 GMT

Hi Michael

reason may be in hardware, one can check AR8035 voltages (in particular ENET_VDDIO)

and compare them with i.MX8M Mini DDR EVK. Just for test one can set default reg = <0>; to check

if it will succeed.

Best regards
igor

Re: IMX8MM with AR8035 issues.

mikechw — Thu, 26 Aug 2021 09:50:25 GMT

Well,

found out the reason why 8035 is not detected..

on bootup the mdio address pins are high..

We changed the phy address to 7 and we can detect the phy and ethernet is working.

Somehow the dts settings are not applied fast enough on bootup.

So on bootup, imx8mm somehow output high on the mdio address pins.

Thanks,

Michael