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    <title>i.MX Processors中的主题 VDDARM Voltage</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/VDDARM-Voltage/m-p/232839#M17882</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Arial','sans-serif'; font-size: 10pt;"&gt;What is the Freescale recommended operation &lt;STRONG&gt;mode&lt;/STRONG&gt; for the VDDARM voltage if the design uses the MMPF0100 PMIC?&amp;nbsp; Our Design implementation for the PMIC matches the Sabre Smart Devices Platform.&amp;nbsp;&amp;nbsp; &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Arial','sans-serif'; font-size: 10pt;"&gt; &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Arial','sans-serif'; font-size: 10pt;"&gt;Is there any advantage to running in the Analog regulation mode if PMIC supplies the ARM and the SOC voltage from separate buck converters as the PMIC MMPF0100?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Arial','sans-serif'; font-size: 10pt;"&gt; &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Arial','sans-serif'; font-size: 10pt;"&gt;If you are using the Analog regulation mode, why bother to change voltage when the CPU changes frequency since a voltage change will just dissipate the power in the internal LDO which is in the iMX6?&amp;nbsp;&amp;nbsp; &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Arial','sans-serif'; font-size: 10pt;"&gt; &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 13 Feb 2014 21:44:12 GMT</pubDate>
    <dc:creator>darrellblock</dc:creator>
    <dc:date>2014-02-13T21:44:12Z</dc:date>
    <item>
      <title>VDDARM Voltage</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/VDDARM-Voltage/m-p/232839#M17882</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Arial','sans-serif'; font-size: 10pt;"&gt;What is the Freescale recommended operation &lt;STRONG&gt;mode&lt;/STRONG&gt; for the VDDARM voltage if the design uses the MMPF0100 PMIC?&amp;nbsp; Our Design implementation for the PMIC matches the Sabre Smart Devices Platform.&amp;nbsp;&amp;nbsp; &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Arial','sans-serif'; font-size: 10pt;"&gt; &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Arial','sans-serif'; font-size: 10pt;"&gt;Is there any advantage to running in the Analog regulation mode if PMIC supplies the ARM and the SOC voltage from separate buck converters as the PMIC MMPF0100?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Arial','sans-serif'; font-size: 10pt;"&gt; &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Arial','sans-serif'; font-size: 10pt;"&gt;If you are using the Analog regulation mode, why bother to change voltage when the CPU changes frequency since a voltage change will just dissipate the power in the internal LDO which is in the iMX6?&amp;nbsp;&amp;nbsp; &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Arial','sans-serif'; font-size: 10pt;"&gt; &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 13 Feb 2014 21:44:12 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/VDDARM-Voltage/m-p/232839#M17882</guid>
      <dc:creator>darrellblock</dc:creator>
      <dc:date>2014-02-13T21:44:12Z</dc:date>
    </item>
    <item>
      <title>Re: VDDARM Voltage</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/VDDARM-Voltage/m-p/232840#M17883</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif';"&gt;&amp;nbsp; IMX6 Datasheet(s) [say, Table 6 (Operating Ranges) of IMX6DQCEC, rev. 2.3, 07_2013] provide &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif';"&gt;VDDARM_IN (VDDSOC_IN) power supply specs for two options : LDO enabled and LDO bypassed.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif';"&gt;The first case is used for cases when internal regulars are applied to supply internal i.MX6 modules;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif';"&gt;the second one is intended for external supply only . The first case is recommended because &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif';"&gt;internal regulators are tested and proven for processor operations, DVFS approach in (Linux) BSP&lt;BR /&gt;uses this case. As for additional consumption, concerned with the regulators – this is optimized and &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: 'Verdana','sans-serif';"&gt;not very critical.&amp;nbsp;&amp;nbsp; &lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 14 Feb 2014 02:29:51 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/VDDARM-Voltage/m-p/232840#M17883</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2014-02-14T02:29:51Z</dc:date>
    </item>
    <item>
      <title>Re: VDDARM Voltage</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/VDDARM-Voltage/m-p/232841#M17884</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi, Darrell&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; If you have an external PMIC,&amp;nbsp; to save power, we should use LDO bypass mode, which means internal analog regulator is bypassed, this is also our default setting of BSP.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 14 Feb 2014 02:52:00 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/VDDARM-Voltage/m-p/232841#M17884</guid>
      <dc:creator>AnsonHuang</dc:creator>
      <dc:date>2014-02-14T02:52:00Z</dc:date>
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