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    <title>topic DDR3 clock connection in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/DDR3-clock-connection/m-p/1314608#M177595</link>
    <description>&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;Which of the DRAM_SDCLK[1:0] pins should be used to use 2 blocks of ram (D0 to D31) in the imxqp ddr3 connection? Would it be enough to use DRAM_SDCLK_0 pins for both blocks?&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;</description>
    <pubDate>Wed, 28 Jul 2021 14:16:27 GMT</pubDate>
    <dc:creator>celiley</dc:creator>
    <dc:date>2021-07-28T14:16:27Z</dc:date>
    <item>
      <title>DDR3 clock connection</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/DDR3-clock-connection/m-p/1314608#M177595</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;Which of the DRAM_SDCLK[1:0] pins should be used to use 2 blocks of ram (D0 to D31) in the imxqp ddr3 connection? Would it be enough to use DRAM_SDCLK_0 pins for both blocks?&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;</description>
      <pubDate>Wed, 28 Jul 2021 14:16:27 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/DDR3-clock-connection/m-p/1314608#M177595</guid>
      <dc:creator>celiley</dc:creator>
      <dc:date>2021-07-28T14:16:27Z</dc:date>
    </item>
    <item>
      <title>Re: DDR3 clock connection</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/DDR3-clock-connection/m-p/1339979#M180080</link>
      <description>&lt;P&gt;Hi celiley,&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;The recommendation is to use both pins, you can check the hardware developers guide and our EVK's to check the configuration of both pins.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Regards,&lt;/P&gt;
&lt;P&gt;Israel.&lt;/P&gt;</description>
      <pubDate>Tue, 14 Sep 2021 19:28:30 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/DDR3-clock-connection/m-p/1339979#M180080</guid>
      <dc:creator>nxf63675</dc:creator>
      <dc:date>2021-09-14T19:28:30Z</dc:date>
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