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    <title>i.MX ProcessorsのトピックIssues while porting the MIPI DSI panel driver to Uboot</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Issues-while-porting-the-MIPI-DSI-panel-driver-to-Uboot/m-p/1306622#M176801</link>
    <description>&lt;DIV class="gmail_default"&gt;Hi NXP Community Members,&lt;/DIV&gt;&lt;DIV class="gmail_default"&gt;We are facing issues while porting the MIPI DSI panel driver to Uboot.&lt;/DIV&gt;&lt;DIV class="gmail_default"&gt;We have our customized ST7703 panel, which we have successfully ported at the kernel layer with VAR-DART-MX8MM and the same is working fine. As we want to enable the splash screen, we tried to port the same driver at the u-boot layer, based on the rm67191 reference panel driver.&lt;/DIV&gt;&lt;DIV class="gmail_default"&gt;Our LCD is connected directly to the MIPI DSI interface. Post porting, we are able to see that the probe and initialization of panel are going correct, logs as attached. But the MIPI clock and LCDIF clock registers are not getting set.&lt;/DIV&gt;&lt;DIV class="gmail_default"&gt;We strongly feel that there is some issue with the clock settings at the u-boot level. Following are the differences in the register values at the kernel and u-boot levels.&lt;/DIV&gt;&lt;DIV class="gmail_default"&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV class="gmail_default"&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV class="gmail_default"&gt;&lt;TABLE border="0" cellspacing="0"&gt;&lt;TBODY&gt;&lt;TR&gt;&lt;TD height="17"&gt;Register&lt;/TD&gt;&lt;TD&gt;Register addr&lt;/TD&gt;&lt;TD&gt;Kernel Layer&lt;/TD&gt;&lt;TD&gt;Uboot Layer&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD height="17"&gt;LCDIF_CTRL1&lt;/TD&gt;&lt;TD&gt;0x10&lt;/TD&gt;&lt;TD&gt;0x3072100&lt;/TD&gt;&lt;TD&gt;0x70100&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD height="17"&gt;LCDIF_CUR_BUF&lt;/TD&gt;&lt;TD&gt;0x40&lt;/TD&gt;&lt;TD&gt;0x0 to 0x78100000&lt;/TD&gt;&lt;TD&gt;0xbf000000&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD height="17"&gt;LCDIF_NEXT_BUF&lt;/TD&gt;&lt;TD&gt;0x50&lt;/TD&gt;&lt;TD&gt;0x78100000&lt;/TD&gt;&lt;TD&gt;0xbf000000&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD height="17"&gt;LCDIF_VDCTRL0&lt;/TD&gt;&lt;TD&gt;0x70&lt;/TD&gt;&lt;TD&gt;0x10300003&lt;/TD&gt;&lt;TD&gt;0x11300003&lt;/TD&gt;&lt;/TR&gt;&lt;/TBODY&gt;&lt;/TABLE&gt;&lt;/DIV&gt;&lt;DIV class="gmail_default"&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV class="gmail_default"&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV class="gmail_default"&gt;As mentioned above these are the value dumps between the kernel layer and u-boot layer. And as communicated on the portal, without changing these registers variscite is able to use the RM67191 panel, then why do we need to change these register settings. We have tried your following commit id:&lt;/DIV&gt;&lt;DIV class="gmail_default"&gt;&lt;A href="https://github.com/varigit/uboot-imx/commit/71b9c57a9327d3bf0d7d0235cc849632c1704793" target="_blank" rel="noopener"&gt;https://github.com/varigit/uboot-imx/commit/71b9c57a9327d3bf0d7d0235cc849632c1704793&lt;/A&gt;&lt;/DIV&gt;&lt;DIV class="gmail_default"&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV class="gmail_default"&gt;And we are using the u-boot version: &lt;A href="https://github.com/varigit/uboot-imx/compare/imx_v2020.04_5.4.24_2.1.0_var02" target="_blank" rel="noopener"&gt;imx_v2020.04_5.4.24_2.1.0_var02&lt;/A&gt;&lt;/DIV&gt;&lt;DIV class="gmail_default"&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV class="gmail_default"&gt;We request your help on the same.&lt;/DIV&gt;&lt;DIV class="gmail_default"&gt;Thanks in advance!&lt;/DIV&gt;</description>
    <pubDate>Tue, 13 Jul 2021 07:00:06 GMT</pubDate>
    <dc:creator>sd05</dc:creator>
    <dc:date>2021-07-13T07:00:06Z</dc:date>
    <item>
      <title>Issues while porting the MIPI DSI panel driver to Uboot</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Issues-while-porting-the-MIPI-DSI-panel-driver-to-Uboot/m-p/1306622#M176801</link>
      <description>&lt;DIV class="gmail_default"&gt;Hi NXP Community Members,&lt;/DIV&gt;&lt;DIV class="gmail_default"&gt;We are facing issues while porting the MIPI DSI panel driver to Uboot.&lt;/DIV&gt;&lt;DIV class="gmail_default"&gt;We have our customized ST7703 panel, which we have successfully ported at the kernel layer with VAR-DART-MX8MM and the same is working fine. As we want to enable the splash screen, we tried to port the same driver at the u-boot layer, based on the rm67191 reference panel driver.&lt;/DIV&gt;&lt;DIV class="gmail_default"&gt;Our LCD is connected directly to the MIPI DSI interface. Post porting, we are able to see that the probe and initialization of panel are going correct, logs as attached. But the MIPI clock and LCDIF clock registers are not getting set.&lt;/DIV&gt;&lt;DIV class="gmail_default"&gt;We strongly feel that there is some issue with the clock settings at the u-boot level. Following are the differences in the register values at the kernel and u-boot levels.&lt;/DIV&gt;&lt;DIV class="gmail_default"&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV class="gmail_default"&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV class="gmail_default"&gt;&lt;TABLE border="0" cellspacing="0"&gt;&lt;TBODY&gt;&lt;TR&gt;&lt;TD height="17"&gt;Register&lt;/TD&gt;&lt;TD&gt;Register addr&lt;/TD&gt;&lt;TD&gt;Kernel Layer&lt;/TD&gt;&lt;TD&gt;Uboot Layer&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD height="17"&gt;LCDIF_CTRL1&lt;/TD&gt;&lt;TD&gt;0x10&lt;/TD&gt;&lt;TD&gt;0x3072100&lt;/TD&gt;&lt;TD&gt;0x70100&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD height="17"&gt;LCDIF_CUR_BUF&lt;/TD&gt;&lt;TD&gt;0x40&lt;/TD&gt;&lt;TD&gt;0x0 to 0x78100000&lt;/TD&gt;&lt;TD&gt;0xbf000000&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD height="17"&gt;LCDIF_NEXT_BUF&lt;/TD&gt;&lt;TD&gt;0x50&lt;/TD&gt;&lt;TD&gt;0x78100000&lt;/TD&gt;&lt;TD&gt;0xbf000000&lt;/TD&gt;&lt;/TR&gt;&lt;TR&gt;&lt;TD height="17"&gt;LCDIF_VDCTRL0&lt;/TD&gt;&lt;TD&gt;0x70&lt;/TD&gt;&lt;TD&gt;0x10300003&lt;/TD&gt;&lt;TD&gt;0x11300003&lt;/TD&gt;&lt;/TR&gt;&lt;/TBODY&gt;&lt;/TABLE&gt;&lt;/DIV&gt;&lt;DIV class="gmail_default"&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV class="gmail_default"&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV class="gmail_default"&gt;As mentioned above these are the value dumps between the kernel layer and u-boot layer. And as communicated on the portal, without changing these registers variscite is able to use the RM67191 panel, then why do we need to change these register settings. We have tried your following commit id:&lt;/DIV&gt;&lt;DIV class="gmail_default"&gt;&lt;A href="https://github.com/varigit/uboot-imx/commit/71b9c57a9327d3bf0d7d0235cc849632c1704793" target="_blank" rel="noopener"&gt;https://github.com/varigit/uboot-imx/commit/71b9c57a9327d3bf0d7d0235cc849632c1704793&lt;/A&gt;&lt;/DIV&gt;&lt;DIV class="gmail_default"&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV class="gmail_default"&gt;And we are using the u-boot version: &lt;A href="https://github.com/varigit/uboot-imx/compare/imx_v2020.04_5.4.24_2.1.0_var02" target="_blank" rel="noopener"&gt;imx_v2020.04_5.4.24_2.1.0_var02&lt;/A&gt;&lt;/DIV&gt;&lt;DIV class="gmail_default"&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV class="gmail_default"&gt;We request your help on the same.&lt;/DIV&gt;&lt;DIV class="gmail_default"&gt;Thanks in advance!&lt;/DIV&gt;</description>
      <pubDate>Tue, 13 Jul 2021 07:00:06 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Issues-while-porting-the-MIPI-DSI-panel-driver-to-Uboot/m-p/1306622#M176801</guid>
      <dc:creator>sd05</dc:creator>
      <dc:date>2021-07-13T07:00:06Z</dc:date>
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