topic Re: iMX6Q boundary scan test problem in i.MX Processors

iMX6Q boundary scan test problem

szgxxu — Thu, 24 Jun 2021 13:54:54 GMT

Does anyone test the boundary scan of iMX6Q? The BSDL file seems not correct. I tested the CAPTURE-IR, IDCODE and boundary scan chain length, all correct. But when I want to control a pin through boundary scan chain, the pin does not have expected response. My board has a iMX6Q with mark MCIMX6Q4AVT08AD.

Can you please provide the correct BSDL file for this model? Thank you!

Re: iMX6Q boundary scan test problem

Rita_Wang — Tue, 29 Jun 2021 03:09:26 GMT

You can download it here https://www.nxp.com/webapp/sps/download/license.jsp?colCode=IMX6_DQ_BSDL&appType=file1&DOWNLOAD_ID=null

Re: iMX6Q boundary scan test problem

szgxxu — Tue, 29 Jun 2021 04:43:09 GMT

These files are not correct. I've tested with these BSDLs. The pin of imx6q is not under control. Do you have any other BSDL files? Have you tested these files before?

Re: iMX6Q boundary scan test problem

Rita_Wang — Tue, 29 Jun 2021 05:47:26 GMT

Sorry I do not have, https://www.nxp.com/webapp/sps/download/preDownload.jsp?render=true

Re: iMX6Q boundary scan test problem

szgxxu — Thu, 01 Jul 2021 03:01:48 GMT

Does anybody can solve this problem?

Re: iMX6Q boundary scan test problem

Yuri — Thu, 01 Jul 2021 03:44:09 GMT

@szgxxu
Hello,

Please refer to ERR009218 (EIM: Signals fail to drive as
outputs during boundary scan test) of the Errata.

https://www.nxp.com/docs/en/errata/IMX6DQCE.pdf

Regards,
Yuri.

Re: iMX6Q boundary scan test problem

szgxxu — Thu, 01 Jul 2021 04:01:21 GMT

Hi Yuri,

Thank you for your reply!

But the problem is not only EIM port signals. On our board, iMX6Q has an SPI interface communicate with another boundary scan chip ( a PPC MCU), these signals can be tested by boundary scan. The schematic of the interface is below:

When I trigger output from the opposite chip and sample responses on iMX6Q, I can not get expected value.

I try to verify the BSDL by control another iMX6Q pin as output, A20, I also can not get the expected state on the pin. This part of schematic is below:

So the problem is not related with the EIM ERR009218.

Do you have any other information about the boundary scan test of iMX6Q? Thank you very much!

Re: iMX6Q boundary scan test problem

Yuri — Thu, 01 Jul 2021 04:31:07 GMT

@szgxxu

There is a workaround for the ERR009218. Perhaps it makes sense
to try it. I will send workaround description directly to You.

Re: iMX6Q boundary scan test problem

szgxxu — Thu, 01 Jul 2021 04:44:30 GMT

Hi Yuri,

Thank you!

I will try your workaround.

Re: iMX6Q boundary scan test problem

irsul — Tue, 06 Jul 2021 08:00:01 GMT

I have same problem. Yuri give some suggestion to use EXTRA DEBUG after reset, but the result still remain.

Re: iMX6Q boundary scan test problem

szgxxu — Tue, 13 Jul 2021 15:13:24 GMT

Hi Yuri, I've got some progress. I can control the iMX6Q's pin, and I can read correct pin state drive from opposite chip. The problem stuck me before is the chain structure, I did not handle the SDMA and DAP correctly. But now, I trapped in a new problem: I can only make the iMX6Q in one of SAMPLE state or EXTEST state. When I shift in the SAMPLE/PRELOAD instruction (5'b00001) into the IR of SJC, I can read the pin state of the iMX6Q during Shift-DR, when I shift in the EXTEST instruction (5'b00010), I can toggle pin state (I monitored the pin state toggling by a oscilloscope), but I can not read state from the input pin. Even more, when I put the chip in EXTEST state, the scan chain DR is broken, all the TDO of the iMX6Q is stuck at 1. Can you please tell me how to solve this problem? Thank you very much!