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    <title>i.MX ProcessorsのトピックMultiple GPT Timers on IMXMN8</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Multiple-GPT-Timers-on-IMXMN8/m-p/1280638#M174408</link>
    <description>&lt;P&gt;void GPT1_IRQHandler(void){&lt;/P&gt;&lt;P&gt;GPT_ClearStatusFlags(GPT1, kGPT_OutputCompare1Flag);&lt;BR /&gt;gpt1IsrFlag=true;&lt;/P&gt;&lt;P&gt;#if defined __CORTEX_M &amp;amp;&amp;amp; (__CORTEX_M == 4U || __CORTEX_M == 7U)&lt;BR /&gt;__DSB();&lt;BR /&gt;#endif&lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;void GPT2_IRQHandler(void){&lt;/P&gt;&lt;P&gt;GPT_ClearStatusFlags(GPT2, kGPT_OutputCompare1Flag);&lt;BR /&gt;gpt2IsrFlag=true;&lt;BR /&gt;//Gridif_fixed_pll();&lt;/P&gt;&lt;P&gt;#if defined __CORTEX_M &amp;amp;&amp;amp; (__CORTEX_M == 4U || __CORTEX_M == 7U)&lt;BR /&gt;__DSB();&lt;BR /&gt;#endif&lt;BR /&gt;}&lt;BR /&gt;//Gridif_variable_pll();&lt;BR /&gt;/* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F, Cortex-M7, Cortex-M7F Store immediate overlapping&lt;BR /&gt;exception return operation might vector to incorrect interrupt */&lt;BR /&gt;//#if defined __CORTEX_M &amp;amp;&amp;amp; (__CORTEX_M == 4U || __CORTEX_M == 7U)&lt;BR /&gt;// __DSB();&lt;BR /&gt;//#endif&lt;BR /&gt;//}&lt;BR /&gt;void timers_init(void)&lt;BR /&gt;{&lt;BR /&gt;uint32_t gptFreq;&lt;BR /&gt;gpt_config_t gptConfig;&lt;/P&gt;&lt;P&gt;/* Board pin, clock, debug console init */&lt;BR /&gt;/* M7 has its local cache and enabled by default,&lt;BR /&gt;* need to set smart subsystems (0x28000000 ~ 0x3FFFFFFF)&lt;BR /&gt;* non-cacheable before accessing this address region */&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;CLOCK_SetRootMux(kCLOCK_RootGpt2, kCLOCK_GptRootmuxSystemPll2Div10); /* Set GPT2 source to SYSTEM PLL2 DIV10 100MHZ */&lt;BR /&gt;CLOCK_SetRootDivider(kCLOCK_RootGpt2, 1U, 2U);&lt;BR /&gt;&lt;BR /&gt;GPT_GetDefaultConfig(&amp;amp;gptConfig);&lt;/P&gt;&lt;P&gt;/* Initialize GPT modules */&lt;BR /&gt;GPT_Init(GPT2, &amp;amp;gptConfig);&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;/* Set root clock to 400MHZ / 2 = 50MHZ */&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;CLOCK_SetRootMux(kCLOCK_RootGpt1, kCLOCK_GptRootmuxSysPll1Div2); /* Set GPT1 source to SYSTEM PLL1 DIV2 400MHZ */&lt;BR /&gt;CLOCK_SetRootDivider(kCLOCK_RootGpt1, 1U, 4U);&lt;/P&gt;&lt;P&gt;/* Initialize GPT modules */&lt;BR /&gt;GPT_Init(GPT1, &amp;amp;gptConfig);&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;/* Divide GPT clock source frequency by 3 inside GPT module */&lt;BR /&gt;GPT_SetClockDivider(GPT1, 3);&lt;BR /&gt;GPT_SetClockDivider(GPT2, 1);&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;/* Get GPT clock frequency */&lt;BR /&gt;gptFreq = GPT1_CLK_FREQ;&lt;/P&gt;&lt;P&gt;/* GPT frequency is divided by 3 inside module */&lt;BR /&gt;gptFreq /= 3;&lt;/P&gt;&lt;P&gt;/* Set both GPT modules to 1 second duration */&lt;BR /&gt;GPT_SetOutputCompareValue(GPT1, kGPT_OutputCompare_Channel1, gptFreq/25000);&lt;BR /&gt;GPT_SetOutputCompareValue(GPT2, kGPT_OutputCompare_Channel1, 1628); // 512*60 Hz&lt;/P&gt;&lt;P&gt;/* Enable GPT Output Compare1 interrupt */&lt;BR /&gt;GPT_EnableInterrupts(GPT1, kGPT_OutputCompare1InterruptEnable);&lt;BR /&gt;GPT_EnableInterrupts(GPT2, kGPT_OutputCompare1InterruptEnable);&lt;/P&gt;&lt;P&gt;/* Enable at the Interrupt */&lt;BR /&gt;EnableIRQ(GPT1_IRQn);&lt;BR /&gt;EnableIRQ(GPT2_IRQn);&lt;BR /&gt;NVIC_SetPriority(GPT1_IRQn, 0x8);&lt;BR /&gt;NVIC_SetPriority(GPT2_IRQn, 0x0);&lt;BR /&gt;GPT_StartTimer(GPT2);&lt;BR /&gt;GPT_StartTimer(GPT1);&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;/* Set both GPT modules to 1 second duration */&lt;BR /&gt;// GPT_SetOutputCompareValue(GPT2, kGPT_OutputCompare_Channel1, 1);&lt;/P&gt;&lt;P&gt;/* Enable GPT Output Compare1 interrupt */&lt;BR /&gt;// GPT_EnableInterrupts(GPT2, kGPT_OutputCompare1InterruptEnable);&lt;/P&gt;&lt;P&gt;/* Enable at the Interrupt */&lt;BR /&gt;// EnableIRQ(GPT2_IRQn);&lt;BR /&gt;// GPT_StartTimer(GPT2);&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I am trying to run two GPT timer interrupts. While each one of them work but when I try to start them together, debugger in Eclipse reboots. Can you please help me fix this? Is there any demo available where multiple ISRs are configured on different GPT timers.&amp;nbsp;&lt;/P&gt;</description>
    <pubDate>Sat, 22 May 2021 04:22:58 GMT</pubDate>
    <dc:creator>borges89</dc:creator>
    <dc:date>2021-05-22T04:22:58Z</dc:date>
    <item>
      <title>Multiple GPT Timers on IMXMN8</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Multiple-GPT-Timers-on-IMXMN8/m-p/1280638#M174408</link>
      <description>&lt;P&gt;void GPT1_IRQHandler(void){&lt;/P&gt;&lt;P&gt;GPT_ClearStatusFlags(GPT1, kGPT_OutputCompare1Flag);&lt;BR /&gt;gpt1IsrFlag=true;&lt;/P&gt;&lt;P&gt;#if defined __CORTEX_M &amp;amp;&amp;amp; (__CORTEX_M == 4U || __CORTEX_M == 7U)&lt;BR /&gt;__DSB();&lt;BR /&gt;#endif&lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;void GPT2_IRQHandler(void){&lt;/P&gt;&lt;P&gt;GPT_ClearStatusFlags(GPT2, kGPT_OutputCompare1Flag);&lt;BR /&gt;gpt2IsrFlag=true;&lt;BR /&gt;//Gridif_fixed_pll();&lt;/P&gt;&lt;P&gt;#if defined __CORTEX_M &amp;amp;&amp;amp; (__CORTEX_M == 4U || __CORTEX_M == 7U)&lt;BR /&gt;__DSB();&lt;BR /&gt;#endif&lt;BR /&gt;}&lt;BR /&gt;//Gridif_variable_pll();&lt;BR /&gt;/* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F, Cortex-M7, Cortex-M7F Store immediate overlapping&lt;BR /&gt;exception return operation might vector to incorrect interrupt */&lt;BR /&gt;//#if defined __CORTEX_M &amp;amp;&amp;amp; (__CORTEX_M == 4U || __CORTEX_M == 7U)&lt;BR /&gt;// __DSB();&lt;BR /&gt;//#endif&lt;BR /&gt;//}&lt;BR /&gt;void timers_init(void)&lt;BR /&gt;{&lt;BR /&gt;uint32_t gptFreq;&lt;BR /&gt;gpt_config_t gptConfig;&lt;/P&gt;&lt;P&gt;/* Board pin, clock, debug console init */&lt;BR /&gt;/* M7 has its local cache and enabled by default,&lt;BR /&gt;* need to set smart subsystems (0x28000000 ~ 0x3FFFFFFF)&lt;BR /&gt;* non-cacheable before accessing this address region */&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;CLOCK_SetRootMux(kCLOCK_RootGpt2, kCLOCK_GptRootmuxSystemPll2Div10); /* Set GPT2 source to SYSTEM PLL2 DIV10 100MHZ */&lt;BR /&gt;CLOCK_SetRootDivider(kCLOCK_RootGpt2, 1U, 2U);&lt;BR /&gt;&lt;BR /&gt;GPT_GetDefaultConfig(&amp;amp;gptConfig);&lt;/P&gt;&lt;P&gt;/* Initialize GPT modules */&lt;BR /&gt;GPT_Init(GPT2, &amp;amp;gptConfig);&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;/* Set root clock to 400MHZ / 2 = 50MHZ */&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;CLOCK_SetRootMux(kCLOCK_RootGpt1, kCLOCK_GptRootmuxSysPll1Div2); /* Set GPT1 source to SYSTEM PLL1 DIV2 400MHZ */&lt;BR /&gt;CLOCK_SetRootDivider(kCLOCK_RootGpt1, 1U, 4U);&lt;/P&gt;&lt;P&gt;/* Initialize GPT modules */&lt;BR /&gt;GPT_Init(GPT1, &amp;amp;gptConfig);&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;/* Divide GPT clock source frequency by 3 inside GPT module */&lt;BR /&gt;GPT_SetClockDivider(GPT1, 3);&lt;BR /&gt;GPT_SetClockDivider(GPT2, 1);&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;/* Get GPT clock frequency */&lt;BR /&gt;gptFreq = GPT1_CLK_FREQ;&lt;/P&gt;&lt;P&gt;/* GPT frequency is divided by 3 inside module */&lt;BR /&gt;gptFreq /= 3;&lt;/P&gt;&lt;P&gt;/* Set both GPT modules to 1 second duration */&lt;BR /&gt;GPT_SetOutputCompareValue(GPT1, kGPT_OutputCompare_Channel1, gptFreq/25000);&lt;BR /&gt;GPT_SetOutputCompareValue(GPT2, kGPT_OutputCompare_Channel1, 1628); // 512*60 Hz&lt;/P&gt;&lt;P&gt;/* Enable GPT Output Compare1 interrupt */&lt;BR /&gt;GPT_EnableInterrupts(GPT1, kGPT_OutputCompare1InterruptEnable);&lt;BR /&gt;GPT_EnableInterrupts(GPT2, kGPT_OutputCompare1InterruptEnable);&lt;/P&gt;&lt;P&gt;/* Enable at the Interrupt */&lt;BR /&gt;EnableIRQ(GPT1_IRQn);&lt;BR /&gt;EnableIRQ(GPT2_IRQn);&lt;BR /&gt;NVIC_SetPriority(GPT1_IRQn, 0x8);&lt;BR /&gt;NVIC_SetPriority(GPT2_IRQn, 0x0);&lt;BR /&gt;GPT_StartTimer(GPT2);&lt;BR /&gt;GPT_StartTimer(GPT1);&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;/* Set both GPT modules to 1 second duration */&lt;BR /&gt;// GPT_SetOutputCompareValue(GPT2, kGPT_OutputCompare_Channel1, 1);&lt;/P&gt;&lt;P&gt;/* Enable GPT Output Compare1 interrupt */&lt;BR /&gt;// GPT_EnableInterrupts(GPT2, kGPT_OutputCompare1InterruptEnable);&lt;/P&gt;&lt;P&gt;/* Enable at the Interrupt */&lt;BR /&gt;// EnableIRQ(GPT2_IRQn);&lt;BR /&gt;// GPT_StartTimer(GPT2);&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I am trying to run two GPT timer interrupts. While each one of them work but when I try to start them together, debugger in Eclipse reboots. Can you please help me fix this? Is there any demo available where multiple ISRs are configured on different GPT timers.&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Sat, 22 May 2021 04:22:58 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Multiple-GPT-Timers-on-IMXMN8/m-p/1280638#M174408</guid>
      <dc:creator>borges89</dc:creator>
      <dc:date>2021-05-22T04:22:58Z</dc:date>
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