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  <channel>
    <title>topic Re: SRTC on IMXRT1051 in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/SRTC-on-IMXRT1051/m-p/1279809#M174333</link>
    <description>&lt;P&gt;where can download AN12085SW.zip&lt;/P&gt;&lt;P&gt;the link is broken&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;Software:&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;A href="https://www.nxp.com/docs/en/application-note-software/AN12085SW.zi" rel="nofollow noopener noreferrer" target="_blank"&gt;https://www.nxp.com/docs/en/application-note-software/AN12085SW.zi&lt;/A&gt;p&lt;/P&gt;</description>
    <pubDate>Thu, 20 May 2021 13:42:34 GMT</pubDate>
    <dc:creator>kunyichen</dc:creator>
    <dc:date>2021-05-20T13:42:34Z</dc:date>
    <item>
      <title>SRTC on IMXRT1051</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/SRTC-on-IMXRT1051/m-p/809934#M124902</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;We want to implement the RTC clock in a new project with the IMXRT1051 processor using Keil MDK. We already found the SNVS examples which show how to activate the SRTC. SRTC is now running but the power consumption is about 60uA which is too much. Has anyone else used the SRTC and has a smaller power consumption? In SNVS there are also general purpose registers named SNVS-&amp;gt;LPGPR which I would need to save some bits for the SRTC, but we are not able to write on it (GPR_SL and&amp;nbsp; GPR_HL are low and we are in privileged mode). Does anyone have a sample code in which the LPGPR can be written? Thanks&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 22 Jun 2018 04:47:47 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/SRTC-on-IMXRT1051/m-p/809934#M124902</guid>
      <dc:creator>mali</dc:creator>
      <dc:date>2018-06-22T04:47:47Z</dc:date>
    </item>
    <item>
      <title>Re: SRTC on IMXRT1051</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/SRTC-on-IMXRT1051/m-p/809935#M124903</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P style="margin: 0px; padding: 0px; border: 0px; font-weight: 400; font-style: normal; font-size: 15px; font-family: arial, helvetica, 'helvetica neue', verdana, sans-serif; vertical-align: baseline; word-wrap: break-word; color: #51626f; font-variant-ligatures: normal; font-variant-caps: normal; letter-spacing: normal; orphans: 2; text-align: left; text-indent: 0px; text-transform: none; white-space: normal; widows: 2; word-spacing: 0px; -webkit-text-stroke-width: 0px; background-color: #ffffff; text-decoration-style: initial; text-decoration-color: initial;"&gt;&amp;nbsp; Perhaps the problem concerns using debugger in order&amp;nbsp; to write the register. &lt;/P&gt;&lt;P style="margin: 0px; padding: 0px; border: 0px; font-weight: 400; font-style: normal; font-size: 15px; font-family: arial, helvetica, 'helvetica neue', verdana, sans-serif; vertical-align: baseline; word-wrap: break-word; color: #51626f; font-variant-ligatures: normal; font-variant-caps: normal; letter-spacing: normal; orphans: 2; text-align: left; text-indent: 0px; text-transform: none; white-space: normal; widows: 2; word-spacing: 0px; -webkit-text-stroke-width: 0px; background-color: #ffffff; text-decoration-style: initial; text-decoration-color: initial; min-height: 8pt;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P style="margin: 0px; padding: 0px; border: 0px; font-weight: 400; font-style: normal; font-size: 15px; font-family: arial, helvetica, 'helvetica neue', verdana, sans-serif; vertical-align: baseline; word-wrap: break-word; color: #51626f; font-variant-ligatures: normal; font-variant-caps: normal; letter-spacing: normal; orphans: 2; text-align: left; text-indent: 0px; text-transform: none; white-space: normal; widows: 2; word-spacing: 0px; -webkit-text-stroke-width: 0px; background-color: #ffffff; text-decoration-style: initial; text-decoration-color: initial;"&gt;&amp;nbsp; "To R/W the LPGPR registers through the debugger, the GPR_Z_DIS bit needs to be set in the LPCR register.&lt;/P&gt;&lt;P style="margin: 0px; padding: 0px; border: 0px; font-weight: 400; font-style: normal; font-size: 15px; font-family: arial, helvetica, 'helvetica neue', verdana, sans-serif; vertical-align: baseline; word-wrap: break-word; color: #51626f; font-variant-ligatures: normal; font-variant-caps: normal; letter-spacing: normal; orphans: 2; text-align: left; text-indent: 0px; text-transform: none; white-space: normal; widows: 2; word-spacing: 0px; -webkit-text-stroke-width: 0px; background-color: #ffffff; text-decoration-style: initial; text-decoration-color: initial;"&gt;When the debugger is used, the SNVS issues a security violation and zeroizes the GPR registers. The GPR_Z_DIS&lt;/P&gt;&lt;P style="margin: 0px; padding: 0px; border: 0px; font-weight: 400; font-style: normal; font-size: 15px; font-family: arial, helvetica, 'helvetica neue', verdana, sans-serif; vertical-align: baseline; word-wrap: break-word; color: #51626f; font-variant-ligatures: normal; font-variant-caps: normal; letter-spacing: normal; orphans: 2; text-align: left; text-indent: 0px; text-transform: none; white-space: normal; widows: 2; word-spacing: 0px; -webkit-text-stroke-width: 0px; background-color: #ffffff; text-decoration-style: initial; text-decoration-color: initial;"&gt;bit needs to be set to keep the LPGPR registers from being zeroed.&lt;/P&gt;&lt;P style="margin: 0px; padding: 0px; border: 0px; font-weight: 400; font-style: normal; font-size: 15px; font-family: arial, helvetica, 'helvetica neue', verdana, sans-serif; vertical-align: baseline; word-wrap: break-word; color: #51626f; font-variant-ligatures: normal; font-variant-caps: normal; letter-spacing: normal; orphans: 2; text-align: left; text-indent: 0px; text-transform: none; white-space: normal; widows: 2; word-spacing: 0px; -webkit-text-stroke-width: 0px; background-color: #ffffff; text-decoration-style: initial; text-decoration-color: initial;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P style="margin: 0px; padding: 0px; border: 0px; font-weight: 400; font-style: normal; font-size: 15px; font-family: arial, helvetica, 'helvetica neue', verdana, sans-serif; vertical-align: baseline; word-wrap: break-word; color: #51626f; font-variant-ligatures: normal; font-variant-caps: normal; letter-spacing: normal; orphans: 2; text-align: left; text-indent: 0px; text-transform: none; white-space: normal; widows: 2; word-spacing: 0px; -webkit-text-stroke-width: 0px; background-color: #ffffff; text-decoration-style: initial; text-decoration-color: initial;"&gt;&amp;nbsp;&amp;nbsp; The LPGPR registers are privileged access R/W. If needed, non-privileged software can access the LPGPR registers&lt;/P&gt;&lt;P style="margin: 0px; padding: 0px; border: 0px; font-weight: 400; font-style: normal; font-size: 15px; font-family: arial, helvetica, 'helvetica neue', verdana, sans-serif; vertical-align: baseline; word-wrap: break-word; color: #51626f; font-variant-ligatures: normal; font-variant-caps: normal; letter-spacing: normal; orphans: 2; text-align: left; text-indent: 0px; text-transform: none; white-space: normal; widows: 2; word-spacing: 0px; -webkit-text-stroke-width: 0px; background-color: #ffffff; text-decoration-style: initial; text-decoration-color: initial;"&gt;by setting the NPSWA_EN bit in HPCOMR. The HPCOMR is accessible by privileged software.&lt;/P&gt;&lt;P style="margin: 0px; padding: 0px; border: 0px; font-weight: 400; font-style: normal; font-size: 15px; font-family: arial, helvetica, 'helvetica neue', verdana, sans-serif; vertical-align: baseline; word-wrap: break-word; color: #51626f; font-variant-ligatures: normal; font-variant-caps: normal; letter-spacing: normal; orphans: 2; text-align: left; text-indent: 0px; text-transform: none; white-space: normal; widows: 2; word-spacing: 0px; -webkit-text-stroke-width: 0px; background-color: #ffffff; text-decoration-style: initial; text-decoration-color: initial; min-height: 8pt;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P style="margin: 0px; padding: 0px; border: 0px; font-weight: 400; font-style: normal; font-size: 15px; font-family: arial, helvetica, 'helvetica neue', verdana, sans-serif; vertical-align: baseline; word-wrap: break-word; color: #51626f; font-variant-ligatures: normal; font-variant-caps: normal; letter-spacing: normal; orphans: 2; text-align: left; text-indent: 0px; text-transform: none; white-space: normal; widows: 2; word-spacing: 0px; -webkit-text-stroke-width: 0px; background-color: #ffffff; text-decoration-style: initial; text-decoration-color: initial;"&gt;&amp;nbsp; For more details on the SNVS,&amp;nbsp; customers may refer to the RM and the SRM&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;A href="https://community.nxp.com/external-link.jspa?url=https%3A%2F%2Fwww.nxp.com%2Fwebapp%2Fsps%2Fdownload%2Fmod_download.jsp%3FcolCode%3DIMXRT1050SRM%26appType%3Dmoderated" rel="nofollow" style="margin: 0px; padding: 0px calc(12px + 0.35ex) 0px 0px; border: 0px; font-weight: inherit; font-style: inherit; font-size: inherit; font-family: inherit; vertical-align: baseline; color: #3d9ce7; fill: #3d9ce7; text-decoration: none; transition: color 0.1s linear;" target="_blank"&gt;&lt;STRONG style="margin: 0px; padding: 0px; border: 0px; font-weight: bold; font-style: inherit; font-size: 15px; font-family: inherit; vertical-align: baseline;"&gt;Security Reference Manual for the i.MX RT1050 Processor&lt;/STRONG&gt;&lt;/A&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;(requires licensing agreement)."&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;A class="link-titled" href="https://www.nxp.com/docs/en/reference-manual/IMXRT1050RM.pdf" title="https://www.nxp.com/docs/en/reference-manual/IMXRT1050RM.pdf"&gt;https://www.nxp.com/docs/en/reference-manual/IMXRT1050RM.pdf&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;Have a great day,&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;Yuri&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&lt;/SPAN&gt;&lt;SPAN class=""&gt;-&lt;/SPAN&gt;&lt;SPAN class=""&gt;-----------------------------------------------------------------------------&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 03 Jul 2018 03:05:42 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/SRTC-on-IMXRT1051/m-p/809935#M124903</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2018-07-03T03:05:42Z</dc:date>
    </item>
    <item>
      <title>Re: SRTC on IMXRT1051</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/SRTC-on-IMXRT1051/m-p/809936#M124904</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Yuri, &lt;/P&gt;&lt;P&gt;you were absolutly right. The problem was that GPR_Z_DIS needed to be set to be able to write to the GPR registers.&lt;/P&gt;&lt;P&gt;So there is only the remaining question, why is the powerconsumption so high (~60µA).&lt;/P&gt;&lt;P&gt;Concerning to datasheet IMXRT1050IEC Rev. 1, 03/2018 chapter 4.3.4.2 OSC32K, it should be possible to deactivate the ring oscillator and so reduce the power consumption to about 6,5µA which would be tolerable for us. The question now is how do we deavtivate the ring oscillator? Is it possible to reduce the power consumption to 6,5µA?&lt;/P&gt;&lt;P&gt;Thanks in advance.&lt;/P&gt;&lt;P&gt;Best regards&lt;/P&gt;&lt;P&gt;Martin&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 05 Jul 2018 12:16:41 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/SRTC-on-IMXRT1051/m-p/809936#M124904</guid>
      <dc:creator>mali</dc:creator>
      <dc:date>2018-07-05T12:16:41Z</dc:date>
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    <item>
      <title>Re: SRTC on IMXRT1051</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/SRTC-on-IMXRT1051/m-p/809937#M124905</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp; According to Table 5 (Low power mode configuration) of app note AN12094&lt;BR /&gt;(Power consumption and measurement of i.MXRT1050, Rev. 0, 11/2017)&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;only (external) RTC32K clock is applied in so called SNVS mode.&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp; Also, AN12085 (How to use iMXRT Low Power feature) may be useful.&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&lt;A href="https://www.nxp.com/docs/en/application-note/AN12094.pdf"&gt;https://www.nxp.com/docs/en/application-note/AN12094.pdf&amp;nbsp;&lt;/A&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&lt;/SPAN&gt;&lt;SPAN class=""&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&lt;A href="https://www.nxp.com/docs/en/application-note/AN12085.pdf"&gt;https://www.nxp.com/docs/en/application-note/AN12085.pdf&amp;nbsp;&lt;/A&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;Software:&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;A href="https://www.nxp.com/docs/en/application-note-software/AN12085SW.zi"&gt;https://www.nxp.com/docs/en/application-note-software/AN12085SW.zi&lt;/A&gt;p&lt;/P&gt;&lt;P class=""&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Yuri.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 06 Jul 2018 05:37:40 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/SRTC-on-IMXRT1051/m-p/809937#M124905</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2018-07-06T05:37:40Z</dc:date>
    </item>
    <item>
      <title>Re: SRTC on IMXRT1051</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/SRTC-on-IMXRT1051/m-p/809938#M124906</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Yuri,&lt;/P&gt;&lt;P&gt;thank you for your reply!&lt;/P&gt;&lt;P&gt;We read through all datasheets, but couldn't find any hints to solving our problem.&lt;/P&gt;&lt;P&gt;Fact is that the power consumption on RTC is too high. At the moment the current is about 60µA and discharges the supercap in about 1 hour. If there is no possibility to reduce the power consumption of the RTC, the internal RTC is useless for us and we need to assemble an external RTC.&lt;/P&gt;&lt;P&gt;Maybe someone other has a solution concerning my problem?&lt;/P&gt;&lt;P&gt;Best regards&lt;/P&gt;&lt;P&gt;Martin&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 10 Jul 2018 06:47:26 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/SRTC-on-IMXRT1051/m-p/809938#M124906</guid>
      <dc:creator>mali</dc:creator>
      <dc:date>2018-07-10T06:47:26Z</dc:date>
    </item>
    <item>
      <title>Re: SRTC on IMXRT1051</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/SRTC-on-IMXRT1051/m-p/809939#M124907</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp; In SNVS (RTC) power mode all power supply voltages on board (except &lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;VDD_SNVS_IN )&amp;nbsp;&lt;/SPAN&gt;&lt;SPAN class=""&gt;should be off. VDD_SNVS_IN (3.3 V) current in such case &lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;is about 20uA (with Tamper detection disabled).&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp; Perhaps external RTC is needed to improve situation. &lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;Also i.MX 7ULP may be considered. But it is not launched yet.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Yuri.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 11 Jul 2018 02:38:08 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/SRTC-on-IMXRT1051/m-p/809939#M124907</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2018-07-11T02:38:08Z</dc:date>
    </item>
    <item>
      <title>Re: SRTC on IMXRT1051</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/SRTC-on-IMXRT1051/m-p/1279809#M174333</link>
      <description>&lt;P&gt;where can download AN12085SW.zip&lt;/P&gt;&lt;P&gt;the link is broken&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;Software:&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;SPAN class=""&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class=""&gt;&lt;A href="https://www.nxp.com/docs/en/application-note-software/AN12085SW.zi" rel="nofollow noopener noreferrer" target="_blank"&gt;https://www.nxp.com/docs/en/application-note-software/AN12085SW.zi&lt;/A&gt;p&lt;/P&gt;</description>
      <pubDate>Thu, 20 May 2021 13:42:34 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/SRTC-on-IMXRT1051/m-p/1279809#M174333</guid>
      <dc:creator>kunyichen</dc:creator>
      <dc:date>2021-05-20T13:42:34Z</dc:date>
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