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  <channel>
    <title>topic UART in M4 Core1 IMX8QM in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/UART-in-M4-Core1-IMX8QM/m-p/1271393#M173529</link>
    <description>&lt;P&gt;Hi All,&lt;/P&gt;&lt;P&gt;I configured &lt;STRONG&gt;M40 UART&lt;/STRONG&gt; in M4 MCU. But, there is no log from M4 UART&lt;/P&gt;&lt;P&gt;by default rear_view_camera application used &lt;STRONG&gt;core1 not core0&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;But, I configured &lt;STRONG&gt;SC_P_M40_I2C0_SDA&lt;/STRONG&gt; as uart in Core1 as per the hardware&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;&lt;FONT face="mingliu,biaukai" size="2" color="#003366"&gt;"&lt;/FONT&gt;&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;&lt;FONT face="mingliu,biaukai" size="2" color="#003366"&gt;+ err = sc_pad_set_all(ipc, SC_P_M40_I2C0_SDA , 2U, SC_PAD_CONFIG_NORMAL, SC_PAD_ISO_OFF, 0x0 ,SC_PAD_WAKEUP_OFF);/* IOMUXD_M40_I2C0_SDA register modification value */&lt;/FONT&gt;&lt;/STRONG&gt;&lt;BR /&gt;&lt;STRONG&gt;&lt;FONT face="mingliu,biaukai" size="2" color="#003366"&gt;+ if (SC_ERR_NONE != err)&lt;/FONT&gt;&lt;/STRONG&gt;&lt;BR /&gt;&lt;STRONG&gt;&lt;FONT face="mingliu,biaukai" size="2" color="#003366"&gt;+ {&lt;/FONT&gt;&lt;/STRONG&gt;&lt;BR /&gt;&lt;STRONG&gt;&lt;FONT face="mingliu,biaukai" size="2" color="#003366"&gt;+ assert(false);&lt;/FONT&gt;&lt;/STRONG&gt;&lt;BR /&gt;&lt;STRONG&gt;&lt;FONT face="mingliu,biaukai" size="2" color="#003366"&gt;+ }&lt;/FONT&gt;&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;&lt;FONT face="mingliu,biaukai" size="2" color="#003366"&gt;"&lt;/FONT&gt;&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Will you please verify my configuration proper or not.&lt;/P&gt;&lt;P&gt;I need clarification -&amp;gt; M4 core0 UART will run or not in M4 core1.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;STRONG&gt;BSP:&lt;/STRONG&gt; L4.14.98 + Android 9 Automotive + MCU SDK&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
    <pubDate>Mon, 03 May 2021 18:33:45 GMT</pubDate>
    <dc:creator>vinothkumars</dc:creator>
    <dc:date>2021-05-03T18:33:45Z</dc:date>
    <item>
      <title>UART in M4 Core1 IMX8QM</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/UART-in-M4-Core1-IMX8QM/m-p/1271393#M173529</link>
      <description>&lt;P&gt;Hi All,&lt;/P&gt;&lt;P&gt;I configured &lt;STRONG&gt;M40 UART&lt;/STRONG&gt; in M4 MCU. But, there is no log from M4 UART&lt;/P&gt;&lt;P&gt;by default rear_view_camera application used &lt;STRONG&gt;core1 not core0&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;But, I configured &lt;STRONG&gt;SC_P_M40_I2C0_SDA&lt;/STRONG&gt; as uart in Core1 as per the hardware&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;&lt;FONT face="mingliu,biaukai" size="2" color="#003366"&gt;"&lt;/FONT&gt;&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;&lt;FONT face="mingliu,biaukai" size="2" color="#003366"&gt;+ err = sc_pad_set_all(ipc, SC_P_M40_I2C0_SDA , 2U, SC_PAD_CONFIG_NORMAL, SC_PAD_ISO_OFF, 0x0 ,SC_PAD_WAKEUP_OFF);/* IOMUXD_M40_I2C0_SDA register modification value */&lt;/FONT&gt;&lt;/STRONG&gt;&lt;BR /&gt;&lt;STRONG&gt;&lt;FONT face="mingliu,biaukai" size="2" color="#003366"&gt;+ if (SC_ERR_NONE != err)&lt;/FONT&gt;&lt;/STRONG&gt;&lt;BR /&gt;&lt;STRONG&gt;&lt;FONT face="mingliu,biaukai" size="2" color="#003366"&gt;+ {&lt;/FONT&gt;&lt;/STRONG&gt;&lt;BR /&gt;&lt;STRONG&gt;&lt;FONT face="mingliu,biaukai" size="2" color="#003366"&gt;+ assert(false);&lt;/FONT&gt;&lt;/STRONG&gt;&lt;BR /&gt;&lt;STRONG&gt;&lt;FONT face="mingliu,biaukai" size="2" color="#003366"&gt;+ }&lt;/FONT&gt;&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;&lt;FONT face="mingliu,biaukai" size="2" color="#003366"&gt;"&lt;/FONT&gt;&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Will you please verify my configuration proper or not.&lt;/P&gt;&lt;P&gt;I need clarification -&amp;gt; M4 core0 UART will run or not in M4 core1.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;STRONG&gt;BSP:&lt;/STRONG&gt; L4.14.98 + Android 9 Automotive + MCU SDK&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Mon, 03 May 2021 18:33:45 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/UART-in-M4-Core1-IMX8QM/m-p/1271393#M173529</guid>
      <dc:creator>vinothkumars</dc:creator>
      <dc:date>2021-05-03T18:33:45Z</dc:date>
    </item>
    <item>
      <title>Re: UART in M4 Core1 IMX8QM</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/UART-in-M4-Core1-IMX8QM/m-p/1271502#M173536</link>
      <description>&lt;P&gt;Hi Vinothkumar&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;for that case except iomux settings one should consider proper resource allocation as described on&lt;/P&gt;
&lt;P&gt;&lt;A href="https://community.nxp.com/t5/i-MX-Processors-Knowledge-Base/System-Controller-Firmware-101-Resource-management-service/ta-p/1123227" target="_blank"&gt;https://community.nxp.com/t5/i-MX-Processors-Knowledge-Base/System-Controller-Firmware-101-Resource-management-service/ta-p/1123227&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;/P&gt;</description>
      <pubDate>Tue, 04 May 2021 00:32:12 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/UART-in-M4-Core1-IMX8QM/m-p/1271502#M173536</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2021-05-04T00:32:12Z</dc:date>
    </item>
    <item>
      <title>Re: UART in M4 Core1 IMX8QM</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/UART-in-M4-Core1-IMX8QM/m-p/1271522#M173538</link>
      <description>&lt;P&gt;Thank you&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/37066"&gt;@igorpadykov&lt;/a&gt;&amp;nbsp;for the quick reply.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;But, Unable to find how to use the core0 resource to core1. Will you please give some more details.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Tue, 04 May 2021 01:54:01 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/UART-in-M4-Core1-IMX8QM/m-p/1271522#M173538</guid>
      <dc:creator>vinothkumars</dc:creator>
      <dc:date>2021-05-04T01:54:01Z</dc:date>
    </item>
    <item>
      <title>Re: UART in M4 Core1 IMX8QM</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/UART-in-M4-Core1-IMX8QM/m-p/1271568#M173546</link>
      <description>&lt;P&gt;please look at sect."Modifying default configuration" suggested link.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;/P&gt;</description>
      <pubDate>Tue, 04 May 2021 05:26:53 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/UART-in-M4-Core1-IMX8QM/m-p/1271568#M173546</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2021-05-04T05:26:53Z</dc:date>
    </item>
    <item>
      <title>Re: UART in M4 Core1 IMX8QM</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/UART-in-M4-Core1-IMX8QM/m-p/1271576#M173549</link>
      <description>&lt;P&gt;Thank you&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/37066"&gt;@igorpadykov&lt;/a&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Yes I checked it. But, I have to use the &lt;STRONG&gt;Cortex-M4 Core0&lt;/STRONG&gt; uart resource to &lt;STRONG&gt;Cortex-M4 Core1&amp;nbsp;&lt;/STRONG&gt;for debug console.&lt;/P&gt;&lt;P&gt;These things I unable to find out&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Tue, 04 May 2021 05:39:54 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/UART-in-M4-Core1-IMX8QM/m-p/1271576#M173549</guid>
      <dc:creator>vinothkumars</dc:creator>
      <dc:date>2021-05-04T05:39:54Z</dc:date>
    </item>
    <item>
      <title>Re: UART in M4 Core1 IMX8QM</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/UART-in-M4-Core1-IMX8QM/m-p/1271661#M173560</link>
      <description>&lt;P&gt;&amp;gt;&lt;SPAN&gt;I have to use the&amp;nbsp;&lt;/SPAN&gt;&lt;STRONG&gt;Cortex-M4 Core0&lt;/STRONG&gt;&lt;SPAN&gt;&amp;nbsp;uart resource to&amp;nbsp;&lt;/SPAN&gt;&lt;STRONG&gt;Cortex-M4 Core1&amp;nbsp;&lt;/STRONG&gt;&lt;SPAN&gt;for debug console.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;may be suggested to assign&amp;nbsp;&lt;STRONG&gt;Core0&lt;/STRONG&gt;&lt;SPAN&gt;&amp;nbsp;uart resource to&amp;nbsp;&lt;STRONG&gt;Core1 partition, use flexcan example from suggested link.&lt;/STRONG&gt;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;&lt;STRONG&gt;Best regards&lt;BR /&gt;igor&lt;/STRONG&gt;&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Tue, 04 May 2021 10:42:56 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/UART-in-M4-Core1-IMX8QM/m-p/1271661#M173560</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2021-05-04T10:42:56Z</dc:date>
    </item>
    <item>
      <title>Re: UART in M4 Core1 IMX8QM</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/UART-in-M4-Core1-IMX8QM/m-p/1271728#M173573</link>
      <description>&lt;P&gt;Thank you&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/37066"&gt;@igorpadykov&lt;/a&gt;&amp;nbsp; for the reply,&lt;/P&gt;&lt;P&gt;/* set as movable */&lt;/P&gt;&lt;P&gt;sc_rm_set_resource_movable(ipc, SC_P_M40_I2C0_SDA, SC_P_M40_I2C0_SDA, SC_TRUE);&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;SCFW to M4_1&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Partition 0 --&amp;gt; SCFW (M40_I2C0_SDA)&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Partition 4 --&amp;gt; M4_1&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Is it the right way ?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Tue, 04 May 2021 13:52:19 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/UART-in-M4-Core1-IMX8QM/m-p/1271728#M173573</guid>
      <dc:creator>vinothkumars</dc:creator>
      <dc:date>2021-05-04T13:52:19Z</dc:date>
    </item>
    <item>
      <title>Re: UART in M4 Core1 IMX8QM</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/UART-in-M4-Core1-IMX8QM/m-p/1277179#M174073</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/37066"&gt;@igorpadykov&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Still I unable to achieve this,&lt;/P&gt;&lt;P&gt;&lt;SPAN class="pln"&gt;SC_P_M40_I2C0_SDA for MIMX8QM_CM4_CORE1&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;I tried almost all API but there is no luck,&lt;/P&gt;&lt;P&gt;&lt;FONT face="impact,chicago"&gt;ipc = SystemGetScfwIpcHandle();&lt;/FONT&gt;&lt;/P&gt;&lt;P&gt;&lt;FONT face="impact,chicago"&gt;sc_rm_get_partition(ipc,&amp;amp;pt_m4);&lt;/FONT&gt;&lt;/P&gt;&lt;P&gt;&lt;FONT face="impact,chicago"&gt;sc_rm_set_pad_movable(ipc, SC_P_M40_I2C0_SCL, SC_P_M40_I2C0_SDA, SC_TRUE);&lt;/FONT&gt;&lt;BR /&gt;&lt;FONT face="impact,chicago"&gt;sc_rm_assign_pad(ipc, pt_m4, SC_P_M40_I2C0_SDA);&lt;/FONT&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN class="com"&gt;#if defined(MIMX8QM_CM4_CORE0)&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class="com"&gt;#define&lt;/SPAN&gt;&lt;SPAN class="pln"&gt; BOARD_INITPINS_TX SC_P_M40_I2C0_SDA &lt;/SPAN&gt;&lt;SPAN class="com"&gt;/*!&amp;lt; Pin function id */&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class="com"&gt;#define&lt;/SPAN&gt;&lt;SPAN class="pln"&gt; BOARD_INITPINS_RX SC_P_M40_I2C0_SCL &lt;/SPAN&gt;&lt;SPAN class="com"&gt;/*!&amp;lt; Pin function id */&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class="com"&gt;#elif&lt;/SPAN&gt; &lt;SPAN class="kwd"&gt;defined&lt;/SPAN&gt;&lt;SPAN class="pun"&gt;(&lt;/SPAN&gt;&lt;SPAN class="pln"&gt;MIMX8QM_CM4_CORE1&lt;/SPAN&gt;&lt;SPAN class="pun"&gt;)&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class="com"&gt;#define&lt;/SPAN&gt;&lt;SPAN class="pln"&gt; BOARD_INITPINS_TX SC_P_M41_I2C0_SDA &lt;/SPAN&gt;&lt;SPAN class="com"&gt;/*!&amp;lt; Pin function id */&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class="com"&gt;#define&lt;/SPAN&gt;&lt;SPAN class="pln"&gt; BOARD_INITPINS_RX SC_P_M41_I2C0_SCL &lt;/SPAN&gt;&lt;SPAN class="com"&gt;/*!&amp;lt; Pin function id */&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class="com"&gt;#else&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class="com"&gt;#error&lt;/SPAN&gt;&lt;SPAN class="pln"&gt; pin config &lt;/SPAN&gt;&lt;SPAN class="kwd"&gt;not&lt;/SPAN&gt; &lt;SPAN class="kwd"&gt;set&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class="com"&gt;#endif&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Sat, 15 May 2021 08:06:32 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/UART-in-M4-Core1-IMX8QM/m-p/1277179#M174073</guid>
      <dc:creator>vinothkumars</dc:creator>
      <dc:date>2021-05-15T08:06:32Z</dc:date>
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