<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic i.mx8 UART0_RX and UART0_TX swapped in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/i-mx8-UART0-RX-and-UART0-TX-swapped/m-p/1270398#M173415</link>
    <description>&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;we want to use serial ports UART0 and UART2 of the i.MX8 on the following pins:&lt;/P&gt;&lt;P&gt;AB32 UART0_RX&lt;BR /&gt;AA29 UART0_TX&lt;BR /&gt;AD34 UART2_RX&lt;BR /&gt;AC35 UART2_TX&lt;/P&gt;&lt;P&gt;UART2 works correctly, however it looks like TX and RX pins of UART0 are swapped.&amp;nbsp;&lt;/P&gt;&lt;P&gt;after executing "&lt;SPAN&gt;echo some text &amp;gt; /dev/ttyLP0" in linux data is coming on UART0_RX (AB32) pin. What could be causing RX/TX swap? &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;We use following UART configuration in device tree:&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;LI-CODE lang="javascript"&gt;&amp;amp;lpuart0 {
	pinctrl-names = "default";
	pinctrl-0 = &amp;lt;&amp;amp;pinctrl_lpuart0&amp;gt;;
	power-domain-names = "uart";
	dma-names = "tx", "rx";
	dmas = &amp;lt;&amp;amp;edma2 9 0 0&amp;gt;,
		&amp;lt;&amp;amp;edma2 8 0 0&amp;gt;;
	status = "okay";
};

&amp;amp;lpuart2 {
	pinctrl-names = "default";
	pinctrl-0 = &amp;lt;&amp;amp;pinctrl_lpuart2&amp;gt;;
	status = "okay";
	/delete-property/ power-domain-names;
	/delete-property/ dma-names;
	/delete-property/ dmas;
};

pinctrl_lpuart0: lpuart0grp {
	fsl,pins = &amp;lt;
		IMX8QXP_UART0_RX_ADMA_UART0_RX		0x06000020
		IMX8QXP_UART0_TX_ADMA_UART0_TX		0x06000020
	&amp;gt;;
};

pinctrl_lpuart2: lpuart2grp {
	fsl,pins = &amp;lt;
		IMX8QXP_UART2_TX_ADMA_UART2_TX		0x06000020
		IMX8QXP_UART2_RX_ADMA_UART2_RX		0x06000020
	&amp;gt;;
};&lt;/LI-CODE&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thank you in advance!&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
    <pubDate>Thu, 29 Apr 2021 14:53:55 GMT</pubDate>
    <dc:creator>sergey_tarassen</dc:creator>
    <dc:date>2021-04-29T14:53:55Z</dc:date>
    <item>
      <title>i.mx8 UART0_RX and UART0_TX swapped</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-mx8-UART0-RX-and-UART0-TX-swapped/m-p/1270398#M173415</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;we want to use serial ports UART0 and UART2 of the i.MX8 on the following pins:&lt;/P&gt;&lt;P&gt;AB32 UART0_RX&lt;BR /&gt;AA29 UART0_TX&lt;BR /&gt;AD34 UART2_RX&lt;BR /&gt;AC35 UART2_TX&lt;/P&gt;&lt;P&gt;UART2 works correctly, however it looks like TX and RX pins of UART0 are swapped.&amp;nbsp;&lt;/P&gt;&lt;P&gt;after executing "&lt;SPAN&gt;echo some text &amp;gt; /dev/ttyLP0" in linux data is coming on UART0_RX (AB32) pin. What could be causing RX/TX swap? &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;We use following UART configuration in device tree:&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;LI-CODE lang="javascript"&gt;&amp;amp;lpuart0 {
	pinctrl-names = "default";
	pinctrl-0 = &amp;lt;&amp;amp;pinctrl_lpuart0&amp;gt;;
	power-domain-names = "uart";
	dma-names = "tx", "rx";
	dmas = &amp;lt;&amp;amp;edma2 9 0 0&amp;gt;,
		&amp;lt;&amp;amp;edma2 8 0 0&amp;gt;;
	status = "okay";
};

&amp;amp;lpuart2 {
	pinctrl-names = "default";
	pinctrl-0 = &amp;lt;&amp;amp;pinctrl_lpuart2&amp;gt;;
	status = "okay";
	/delete-property/ power-domain-names;
	/delete-property/ dma-names;
	/delete-property/ dmas;
};

pinctrl_lpuart0: lpuart0grp {
	fsl,pins = &amp;lt;
		IMX8QXP_UART0_RX_ADMA_UART0_RX		0x06000020
		IMX8QXP_UART0_TX_ADMA_UART0_TX		0x06000020
	&amp;gt;;
};

pinctrl_lpuart2: lpuart2grp {
	fsl,pins = &amp;lt;
		IMX8QXP_UART2_TX_ADMA_UART2_TX		0x06000020
		IMX8QXP_UART2_RX_ADMA_UART2_RX		0x06000020
	&amp;gt;;
};&lt;/LI-CODE&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thank you in advance!&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Thu, 29 Apr 2021 14:53:55 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-mx8-UART0-RX-and-UART0-TX-swapped/m-p/1270398#M173415</guid>
      <dc:creator>sergey_tarassen</dc:creator>
      <dc:date>2021-04-29T14:53:55Z</dc:date>
    </item>
    <item>
      <title>Re: i.mx8 UART0_RX and UART0_TX swapped</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-mx8-UART0-RX-and-UART0-TX-swapped/m-p/1272858#M173667</link>
      <description>&lt;P&gt;Problem was caused due to missmatch between layout and schematics. Actually UART works as expected.&lt;/P&gt;</description>
      <pubDate>Thu, 06 May 2021 08:25:04 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-mx8-UART0-RX-and-UART0-TX-swapped/m-p/1272858#M173667</guid>
      <dc:creator>sergey_tarassen</dc:creator>
      <dc:date>2021-05-06T08:25:04Z</dc:date>
    </item>
  </channel>
</rss>

