<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic How to do memory distribution when 512M DDR in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/How-to-do-memory-distribution-when-512M-DDR/m-p/1267647#M173142</link>
    <description>&lt;P&gt;When I used 512M DDR on i.MX8QXP platform,how to distribute the memory and reserved memory&lt;/P&gt;&lt;P&gt;at boot and kernel?&lt;/P&gt;</description>
    <pubDate>Sun, 25 Apr 2021 10:53:55 GMT</pubDate>
    <dc:creator>xu_ji1</dc:creator>
    <dc:date>2021-04-25T10:53:55Z</dc:date>
    <item>
      <title>How to do memory distribution when 512M DDR</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/How-to-do-memory-distribution-when-512M-DDR/m-p/1267647#M173142</link>
      <description>&lt;P&gt;When I used 512M DDR on i.MX8QXP platform,how to distribute the memory and reserved memory&lt;/P&gt;&lt;P&gt;at boot and kernel?&lt;/P&gt;</description>
      <pubDate>Sun, 25 Apr 2021 10:53:55 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/How-to-do-memory-distribution-when-512M-DDR/m-p/1267647#M173142</guid>
      <dc:creator>xu_ji1</dc:creator>
      <dc:date>2021-04-25T10:53:55Z</dc:date>
    </item>
    <item>
      <title>Re: How to do memory distribution when 512M DDR</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/How-to-do-memory-distribution-when-512M-DDR/m-p/1267700#M173157</link>
      <description>&lt;P&gt;Hi Xu&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;one can try to decrease cma size in&lt;/P&gt;
&lt;P&gt;&lt;A href="https://source.codeaurora.org/external/imx/linux-imx/tree/arch/arm64/boot/dts/freescale/imx8x-mek.dtsi?h=imx_5.4.70_2.3.0" target="_blank"&gt;https://source.codeaurora.org/external/imx/linux-imx/tree/arch/arm64/boot/dts/freescale/imx8x-mek.dtsi?h=imx_5.4.70_2.3.0&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;Verify that proper RPA tool was used and board passed ddr test&lt;/P&gt;
&lt;P&gt;&lt;A href="https://community.nxp.com/t5/i-MX-Processors-Knowledge-Base/i-MX-8-8X-Family-DDR-Tools-Release/ta-p/1121519" target="_blank"&gt;https://community.nxp.com/t5/i-MX-Processors-Knowledge-Base/i-MX-8-8X-Family-DDR-Tools-Release/ta-p/1121519&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;/P&gt;</description>
      <pubDate>Mon, 26 Apr 2021 00:14:42 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/How-to-do-memory-distribution-when-512M-DDR/m-p/1267700#M173157</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2021-04-26T00:14:42Z</dc:date>
    </item>
  </channel>
</rss>

