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    <title>i.MX ProcessorsのトピックRe: uSDHC shared resources</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/uSDHC-shared-resources/m-p/1267241#M173104</link>
    <description>&lt;P&gt;Hi Rooper&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;1. for uSDHC usage one can look at SDK example&lt;/P&gt;
&lt;P&gt;&lt;A href="https://github.com/RT-Thread/rt-thread/tree/master/bsp/imx6sx/iMX6_Platform_SDK/sdk/drivers/usdhc" target="_blank"&gt;https://github.com/RT-Thread/rt-thread/tree/master/bsp/imx6sx/iMX6_Platform_SDK/sdk/drivers/usdhc&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;2. all uSDHC instances are independent modules. So SYS_CTRL resets only one module.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;/P&gt;</description>
    <pubDate>Fri, 23 Apr 2021 10:34:11 GMT</pubDate>
    <dc:creator>igorpadykov</dc:creator>
    <dc:date>2021-04-23T10:34:11Z</dc:date>
    <item>
      <title>uSDHC shared resources</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/uSDHC-shared-resources/m-p/1267206#M173101</link>
      <description>&lt;P&gt;I have encountered a bit of understanding gap in which parts of a controller are common and which are dedicated to each channel.&lt;/P&gt;&lt;OL&gt;&lt;LI&gt;Do reset registers on SYS_CTRL(RSTC, RSTD and RSTA) reset whole circuit or only channel, on which they are set(also, are RSTC and D necessary before RSTA)?&lt;/LI&gt;&lt;LI&gt;Are DLL and clock seperate or each time driver operates with another card it has to switch clock?&lt;/LI&gt;&lt;/OL&gt;</description>
      <pubDate>Fri, 23 Apr 2021 09:21:38 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/uSDHC-shared-resources/m-p/1267206#M173101</guid>
      <dc:creator>RooperK</dc:creator>
      <dc:date>2021-04-23T09:21:38Z</dc:date>
    </item>
    <item>
      <title>Re: uSDHC shared resources</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/uSDHC-shared-resources/m-p/1267241#M173104</link>
      <description>&lt;P&gt;Hi Rooper&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;1. for uSDHC usage one can look at SDK example&lt;/P&gt;
&lt;P&gt;&lt;A href="https://github.com/RT-Thread/rt-thread/tree/master/bsp/imx6sx/iMX6_Platform_SDK/sdk/drivers/usdhc" target="_blank"&gt;https://github.com/RT-Thread/rt-thread/tree/master/bsp/imx6sx/iMX6_Platform_SDK/sdk/drivers/usdhc&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;2. all uSDHC instances are independent modules. So SYS_CTRL resets only one module.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;/P&gt;</description>
      <pubDate>Fri, 23 Apr 2021 10:34:11 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/uSDHC-shared-resources/m-p/1267241#M173104</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2021-04-23T10:34:11Z</dc:date>
    </item>
    <item>
      <title>Re: uSDHC shared resources</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/uSDHC-shared-resources/m-p/1267261#M173110</link>
      <description>&lt;P&gt;Thank you for answer. As I understand, since each instance is seperate module, buffer, DLL and clock are seperate too? Documentation specifies broadcast commands, which are send to all cards. Are they confined to module or send to all modules?&lt;/P&gt;</description>
      <pubDate>Fri, 23 Apr 2021 12:45:19 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/uSDHC-shared-resources/m-p/1267261#M173110</guid>
      <dc:creator>RooperK</dc:creator>
      <dc:date>2021-04-23T12:45:19Z</dc:date>
    </item>
    <item>
      <title>Re: uSDHC shared resources</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/uSDHC-shared-resources/m-p/1267299#M173116</link>
      <description>&lt;P&gt;yes they are separate.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;/P&gt;</description>
      <pubDate>Fri, 23 Apr 2021 13:49:26 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/uSDHC-shared-resources/m-p/1267299#M173116</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2021-04-23T13:49:26Z</dc:date>
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