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    <title>topic Re: Enable CSI in IPU_CONF causes board to hang when using Android. in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Enable-CSI-in-IPU-CONF-causes-board-to-hang-when-using-Android/m-p/230282#M17155</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;You can reference to the Freescale Android BSP document, such as "i.MXAndroidJB4.2.2_1.1.0GAFAQ.html", for "How do I configure rear and front camera" and "how do I configure camera sensor parameters".&lt;/P&gt;&lt;P&gt;If you haven't added the camera sensor correctly, I think it will not get correct buffer for capture, then when enabled CSI, because no correct IDMAC memory address was set, kernel will hang up.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Mon, 26 Aug 2013 01:50:43 GMT</pubDate>
    <dc:creator>qiang_li-mpu_se</dc:creator>
    <dc:date>2013-08-26T01:50:43Z</dc:date>
    <item>
      <title>Enable CSI in IPU_CONF causes board to hang when using Android.</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Enable-CSI-in-IPU-CONF-causes-board-to-hang-when-using-Android/m-p/230281#M17154</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;i am trying to get a new camera running on MX6Solo. I have the CSI running, and able to capture single-shots using a small console capture program (no gui, no preview). I.e. the route from camera to /dev/video0 seem OK.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I have also enabled the CSI test mode to generate a checker-board. I see this too when I capture with my little console program.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;However; If I start the camera app on the phone, now involving Android and possibly preview, I get a kernel stop. A stop with no messages, no dump, nothing, it simply hangs!&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The lights go out just after I do "ipu_cm_write(ipu, reg | IPU_CONF_CSI0_EN, IPU_CONF);" (ipu_common.c).&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The strange thing is that my small capture program works ok. So I *suspect* it may be in regard with the &lt;SPAN style="text-decoration: underline;"&gt;preview&lt;/SPAN&gt; or something else caused by Android.&lt;/P&gt;&lt;UL&gt;&lt;LI&gt; I have tried to log interrupts, and it does not seem I am getting any interrupts after the 'enable' of CSI0, so I don't think it is an interrupt hanging. Maybe it is a bad DMA setup? (&lt;STRONG style="text-decoration: underline;"&gt;however I need a good idea of how to look into that&lt;/STRONG&gt;).&lt;/LI&gt;&lt;LI&gt;I have tried hardcoding IPU_CONF to just IPU_CONF_CSI0_EN (to disable as much IPU flow as possible), but it still dies.&lt;/LI&gt;&lt;LI&gt;I have tried skipping the "enable"-line of code, and then the code does NOT crash or hang.&lt;/LI&gt;&lt;/UL&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt; So: In short: I enable CSI0, and the platform stops!&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Any ideas are appreciated!&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt; I have logged the following registers just prior to enabling CSI0: They look much the same as for my console capture. Only exception is: IPU_INT_CTRL(10) =&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x777F000&lt;SPAN style="text-decoration: underline;"&gt;&lt;STRONG&gt;F&lt;/STRONG&gt;&lt;/SPAN&gt;.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt; IPU_CONF =&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x000007A0&lt;/P&gt;&lt;P&gt; IDMAC_CONF =&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x0000002F&lt;/P&gt;&lt;P&gt; IDMAC_CHA_EN1 =&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x00800001&lt;/P&gt;&lt;P&gt; IDMAC_CHA_EN2 =&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x00000000&lt;/P&gt;&lt;P&gt; IDMAC_CHA_PRI1 =&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x18800001&lt;/P&gt;&lt;P&gt; IDMAC_CHA_PRI2 =&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x00000000&lt;/P&gt;&lt;P&gt; IDMAC_BAND_EN1 =&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x00000000&lt;/P&gt;&lt;P&gt; IDMAC_BAND_EN2 =&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x00000000&lt;/P&gt;&lt;P&gt; IPU_CHA_DB_MODE_SEL0 =&amp;nbsp; 0x00000001&lt;/P&gt;&lt;P&gt; IPU_CHA_DB_MODE_SEL1 =&amp;nbsp; 0x00000000&lt;/P&gt;&lt;P&gt; IPU_CHA_TRB_MODE_SEL0 =&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x00800000&lt;/P&gt;&lt;P&gt; IPU_CHA_TRB_MODE_SEL1 =&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x00000000&lt;/P&gt;&lt;P&gt; DMFC_WR_CHAN =&amp;nbsp; 0x00000090&lt;/P&gt;&lt;P&gt; DMFC_WR_CHAN_DEF =&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x202020F6&lt;/P&gt;&lt;P&gt; DMFC_DP_CHAN =&amp;nbsp; 0x00009694&lt;/P&gt;&lt;P&gt; DMFC_DP_CHAN_DEF =&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x2020F6F6&lt;/P&gt;&lt;P&gt; DMFC_IC_CTRL =&amp;nbsp; 0x00000002&lt;/P&gt;&lt;P&gt; IPU_FS_PROC_FLOW1 =&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x00000000&lt;/P&gt;&lt;P&gt; IPU_FS_PROC_FLOW2 =&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x00000000&lt;/P&gt;&lt;P&gt; IPU_FS_PROC_FLOW3 =&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x00000000&lt;/P&gt;&lt;P&gt; IPU_FS_DISP_FLOW1 =&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x00000000&lt;/P&gt;&lt;P&gt; IPU_VDIC_VDI_FSIZE =&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x00000000&lt;/P&gt;&lt;P&gt; IPU_VDIC_VDI_C =&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x00000000&lt;/P&gt;&lt;P&gt; IPU_IC_CONF =&amp;nbsp;&amp;nbsp; 0x00000000&lt;/P&gt;&lt;P&gt; IPU_INT_CTRL(1) =&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x80000001&lt;/P&gt;&lt;P&gt; IPU_INT_CTRL(2) =&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x00080000&lt;/P&gt;&lt;P&gt; IPU_INT_CTRL(3) =&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x00000000&lt;/P&gt;&lt;P&gt; IPU_INT_CTRL(4) =&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x00000000&lt;/P&gt;&lt;P&gt; IPU_INT_CTRL(5) =&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0xBFFEFF2F&lt;/P&gt;&lt;P&gt; IPU_INT_CTRL(6) =&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x001FFF02&lt;/P&gt;&lt;P&gt; IPU_INT_CTRL(7) =&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x00000000&lt;/P&gt;&lt;P&gt; IPU_INT_CTRL(8) =&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x00000000&lt;/P&gt;&lt;P&gt; IPU_INT_CTRL(9) =&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0xDC000001&lt;/P&gt;&lt;P&gt; IPU_INT_CTRL(10) =&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x777F000E&lt;/P&gt;&lt;P&gt; IPU_INT_CTRL(11) =&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x00000000&lt;/P&gt;&lt;P&gt; IPU_INT_CTRL(12) =&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x00000000&lt;/P&gt;&lt;P&gt; IPU_INT_CTRL(13) =&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x00000000&lt;/P&gt;&lt;P&gt; IPU_INT_CTRL(14) =&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x00000000&lt;/P&gt;&lt;P&gt; IPU_INT_CTRL(15) =&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x00000000&lt;/P&gt;&lt;P&gt; IPU_SDMA(1) =&amp;nbsp;&amp;nbsp; 0x00000000&lt;/P&gt;&lt;P&gt; IPU_SDMA(2) =&amp;nbsp;&amp;nbsp; 0x00000000&lt;/P&gt;&lt;P&gt; IPU_SDMA(3) =&amp;nbsp;&amp;nbsp; 0x00000000&lt;/P&gt;&lt;P&gt; IPU_SDMA(4) =&amp;nbsp;&amp;nbsp; 0x00000000&lt;/P&gt;&lt;P&gt; IPU_SDMA(5) =&amp;nbsp;&amp;nbsp; 0x00000000&lt;/P&gt;&lt;P&gt; IPU_SDMA(6) =&amp;nbsp;&amp;nbsp; 0x00000000&lt;/P&gt;&lt;P&gt; IPU_SDMA(7) =&amp;nbsp;&amp;nbsp; 0x00000000&lt;/P&gt;&lt;P&gt; IPU_SDMA(8) =&amp;nbsp;&amp;nbsp; 0x00000000&lt;/P&gt;&lt;P&gt; IPU_SDMA(9) =&amp;nbsp;&amp;nbsp; 0x00000000&lt;/P&gt;&lt;P&gt; IPU_SDMA(10) =&amp;nbsp; 0x00000000&lt;/P&gt;&lt;P&gt; IPU_SDMA(11) =&amp;nbsp; 0x00000100&lt;/P&gt;&lt;P&gt; IPU_SDMA(12) =&amp;nbsp; 0x06050803&lt;/P&gt;&lt;P&gt; IPU_SDMA(13) =&amp;nbsp; 0x00000000&lt;/P&gt;&lt;P&gt; IPU_SDMA(14) =&amp;nbsp; 0x00000000&lt;/P&gt;&lt;P&gt; IPU_SDMA(15) =&amp;nbsp; 0x00000000&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt; CSI information for csi0&lt;/P&gt;&lt;P&gt; CSI_CONF =&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x040A8818&lt;/P&gt;&lt;P&gt; CSI_SENS_FRM_SIZE =&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x01DF027F&lt;/P&gt;&lt;P&gt; CSI_ACT_FRM_SIZE =&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x01DF027F&lt;/P&gt;&lt;P&gt; CSI_OUT_FRM_CTRL =&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x00000000&lt;/P&gt;&lt;P&gt; CSI_TST_CTRL =&amp;nbsp; 0x017FFF7F&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 30 Jul 2013 12:07:17 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Enable-CSI-in-IPU-CONF-causes-board-to-hang-when-using-Android/m-p/230281#M17154</guid>
      <dc:creator>MadsMeisner</dc:creator>
      <dc:date>2013-07-30T12:07:17Z</dc:date>
    </item>
    <item>
      <title>Re: Enable CSI in IPU_CONF causes board to hang when using Android.</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Enable-CSI-in-IPU-CONF-causes-board-to-hang-when-using-Android/m-p/230282#M17155</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;You can reference to the Freescale Android BSP document, such as "i.MXAndroidJB4.2.2_1.1.0GAFAQ.html", for "How do I configure rear and front camera" and "how do I configure camera sensor parameters".&lt;/P&gt;&lt;P&gt;If you haven't added the camera sensor correctly, I think it will not get correct buffer for capture, then when enabled CSI, because no correct IDMAC memory address was set, kernel will hang up.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 26 Aug 2013 01:50:43 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Enable-CSI-in-IPU-CONF-causes-board-to-hang-when-using-Android/m-p/230282#M17155</guid>
      <dc:creator>qiang_li-mpu_se</dc:creator>
      <dc:date>2013-08-26T01:50:43Z</dc:date>
    </item>
    <item>
      <title>Re: Enable CSI in IPU_CONF causes board to hang when using Android.</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Enable-CSI-in-IPU-CONF-causes-board-to-hang-when-using-Android/m-p/230283#M17156</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;To Mads Meisner &amp;amp; Qiang Li&lt;/P&gt;&lt;P&gt;Tell me please how to read IPU registers (IPU_CONF and others)?&lt;/P&gt;&lt;P&gt;I tried such code&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;struct ipu_soc *ipu;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;ipu = ipu_get_soc(0);&lt;BR /&gt;ipu_conf = ipu_cm_read(ipu, IPU_CONF);&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;It doesn't work&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 24 Oct 2013 06:38:35 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Enable-CSI-in-IPU-CONF-causes-board-to-hang-when-using-Android/m-p/230283#M17156</guid>
      <dc:creator>michaelsadikov</dc:creator>
      <dc:date>2013-10-24T06:38:35Z</dc:date>
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