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    <title>topic Re: i.mx6ulz Default SD pins for eFuse Boot in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/i-mx6ulz-Default-SD-pins-for-eFuse-Boot/m-p/1252462#M171509</link>
    <description>&lt;P&gt;Hi Igor,&lt;/P&gt;&lt;P&gt;Thank you for the answer. We just ran into that table after posting here. Much appreciated.&lt;/P&gt;</description>
    <pubDate>Fri, 26 Mar 2021 00:40:12 GMT</pubDate>
    <dc:creator>Angshu</dc:creator>
    <dc:date>2021-03-26T00:40:12Z</dc:date>
    <item>
      <title>i.mx6ulz Default SD pins for eFuse Boot</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-mx6ulz-Default-SD-pins-for-eFuse-Boot/m-p/1252353#M171496</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I posted this previously and it was confirmed from nxp that for eFuses to work, we must have the default SD2 pins assigned to the SD slot to boot from SD 2 with eFuses. :&amp;nbsp;&lt;A href="https://community.nxp.com/t5/i-MX-Processors/I-MX6ULZ-eFuse-boot-from-SD-with-custom-pinmux-for-SD-slot/m-p/1238954" target="_blank"&gt;https://community.nxp.com/t5/i-MX-Processors/I-MX6ULZ-eFuse-boot-from-SD-with-custom-pinmux-for-SD-slot/m-p/1238954&lt;/A&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;However, now we are attempting to make the changes on our board and are having a difficult time understanding which actually the default SD2 slot pins are.&lt;/P&gt;&lt;P&gt;So as an example lets take &lt;STRONG&gt;SD2_CLK&lt;/STRONG&gt; signal. Based on the RM the USDHC2 CLK can be routed to &lt;STRONG&gt;SD2_CLK&lt;/STRONG&gt;, &lt;STRONG&gt;GPIO3_IO24&lt;/STRONG&gt;, and&lt;STRONG&gt; NAND_RE_B&lt;/STRONG&gt; pins/pads. But &lt;STRONG&gt;ALT1&lt;/STRONG&gt; mode is for only &lt;STRONG&gt;SD2_CLK&lt;/STRONG&gt; and &lt;STRONG&gt;NAND_RE_B&lt;/STRONG&gt;. We used &lt;STRONG&gt;SD2_CLK&lt;/STRONG&gt;&amp;nbsp;as this seems like the default SD2 clock pin. However, on&amp;nbsp;the 6ull EVK they are actually using the &lt;STRONG&gt;NAND_RE_B&lt;/STRONG&gt; for &lt;STRONG&gt;SD2_CLK &lt;/STRONG&gt;and similarly the rest of the SD2 signals are also different and related to NAND instead of SD2 (e.g NAND_WE_B instead of SD2_CMD).&lt;/P&gt;&lt;P&gt;We blew the eFuses and the fuse values were read correct afterwards but could not boot to u-boot or OS. We can boot the OS fine via Serial downloader mode so all other operations are verified to work. Fuse values set and read below.&lt;/P&gt;&lt;P&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;&amp;nbsp;&lt;FONT face="courier new,courier"&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;fuse prog 0 6 0x10&lt;/FONT&gt;&lt;/P&gt;&lt;P&gt;&lt;FONT face="courier new,courier"&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;fuse prog 0 5 0x2840&lt;/FONT&gt;&lt;/P&gt;&lt;P&gt;&lt;FONT face="courier new,courier"&gt;&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;&amp;nbsp;&lt;/FONT&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;So, ultimately our question is, which are the default pins for the SD2 signals that the ROM code looks in order to boot? the SD2_XXX or NAND_XXXX? If it is NAND_XXX, why is it that one? Or does it look at both?&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;The reference manual table :&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Angshu_0-1616692964094.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/140672iDFC1A5721BE8CCFF/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Angshu_0-1616692964094.png" alt="Angshu_0-1616692964094.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;And our schematics for SD2 slot is as follows:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Angshu_4-1616696451827.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/140677iBACE66FA42DC164E/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Angshu_4-1616696451827.png" alt="Angshu_4-1616696451827.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Reference design Schematic snippet from the EVK schematic file.&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Angshu_3-1616696373607.png" style="width: 761px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/140676i0E9577421DA0FAA3/image-dimensions/761x78?v=v2" width="761" height="78" role="button" title="Angshu_3-1616696373607.png" alt="Angshu_3-1616696373607.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Thu, 25 Mar 2021 18:32:54 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-mx6ulz-Default-SD-pins-for-eFuse-Boot/m-p/1252353#M171496</guid>
      <dc:creator>Angshu</dc:creator>
      <dc:date>2021-03-25T18:32:54Z</dc:date>
    </item>
    <item>
      <title>Re: i.mx6ulz Default SD pins for eFuse Boot</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-mx6ulz-Default-SD-pins-for-eFuse-Boot/m-p/1252456#M171507</link>
      <description>&lt;P&gt;Hi Angshu&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;default SD pins for boot are described in sect.8.5.3.4 IOMUX configuration for SD/MMC&lt;/P&gt;
&lt;P&gt;&lt;A id="relatedDocsClick_1" href="https://www.nxp.com/webapp/Download?colCode=IMX6ULZRM" target="_blank" rel="noopener"&gt;&lt;STRONG&gt;i.MX 6ULZ Applications Processor Reference Manual&lt;/STRONG&gt;&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;/P&gt;</description>
      <pubDate>Fri, 26 Mar 2021 00:30:24 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-mx6ulz-Default-SD-pins-for-eFuse-Boot/m-p/1252456#M171507</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2021-03-26T00:30:24Z</dc:date>
    </item>
    <item>
      <title>Re: i.mx6ulz Default SD pins for eFuse Boot</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-mx6ulz-Default-SD-pins-for-eFuse-Boot/m-p/1252462#M171509</link>
      <description>&lt;P&gt;Hi Igor,&lt;/P&gt;&lt;P&gt;Thank you for the answer. We just ran into that table after posting here. Much appreciated.&lt;/P&gt;</description>
      <pubDate>Fri, 26 Mar 2021 00:40:12 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-mx6ulz-Default-SD-pins-for-eFuse-Boot/m-p/1252462#M171509</guid>
      <dc:creator>Angshu</dc:creator>
      <dc:date>2021-03-26T00:40:12Z</dc:date>
    </item>
    <item>
      <title>Re: i.mx6ulz Default SD pins for eFuse Boot</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-mx6ulz-Default-SD-pins-for-eFuse-Boot/m-p/1255113#M171887</link>
      <description>&lt;P&gt;Hi Igor,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Follow up question regarding this. Currently we have CLK, CMD, Data00 - 03 lines connected for SD.&lt;/P&gt;&lt;P&gt;We are rerouting it now as follows :&lt;/P&gt;&lt;P&gt;Signal&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; Pin&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; Pad&lt;BR /&gt;USDCH2_CLK&amp;nbsp; &amp;nbsp; &amp;nbsp; NAND_RE_B&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp; D8&lt;BR /&gt;USDCH2_CMD&amp;nbsp; &amp;nbsp; &amp;nbsp;NAND_WE_B&amp;nbsp; &amp;nbsp; &amp;nbsp; &amp;nbsp;C8&lt;BR /&gt;USDCH2_DATA0&amp;nbsp; NAND_DATA00&amp;nbsp; &amp;nbsp; D7&lt;BR /&gt;USDCH2_DATA1&amp;nbsp; NAND_DATA01&amp;nbsp; &amp;nbsp; B7&lt;BR /&gt;USDCH2_DATA2&amp;nbsp; NAND_DATA02&amp;nbsp; &amp;nbsp; A7&lt;BR /&gt;USDCH2_DATA3&amp;nbsp; NAND_DATA03&amp;nbsp; &amp;nbsp; D6&lt;BR /&gt;&lt;BR /&gt;Will this be enough for the ROM to boot from our SD2 slot or do we need to connect other sd2 related signals that we do not use at the moment such as these below?&lt;BR /&gt;&lt;BR /&gt;DATA4&amp;nbsp; &amp;nbsp;NAND_DATA04&lt;BR /&gt;DATA5&amp;nbsp; &amp;nbsp;NAND_DATA05&lt;BR /&gt;DATA6&amp;nbsp; &amp;nbsp;NAND_DATA06&lt;BR /&gt;DATA7&amp;nbsp; &amp;nbsp; NAND_DATA07&lt;BR /&gt;VSELECT&amp;nbsp; GPIO1_IO08&lt;BR /&gt;RESET_B&amp;nbsp; &amp;nbsp;NAND_ALE&lt;/P&gt;</description>
      <pubDate>Wed, 31 Mar 2021 17:59:55 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-mx6ulz-Default-SD-pins-for-eFuse-Boot/m-p/1255113#M171887</guid>
      <dc:creator>Angshu</dc:creator>
      <dc:date>2021-03-31T17:59:55Z</dc:date>
    </item>
    <item>
      <title>Re: i.mx6ulz Default SD pins for eFuse Boot</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-mx6ulz-Default-SD-pins-for-eFuse-Boot/m-p/1255499#M171920</link>
      <description>&lt;P&gt;yes this is enough for ROM to boot from SD2.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;/P&gt;</description>
      <pubDate>Thu, 01 Apr 2021 05:14:48 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-mx6ulz-Default-SD-pins-for-eFuse-Boot/m-p/1255499#M171920</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2021-04-01T05:14:48Z</dc:date>
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