topic IPU Usage on IMX6 processor.. in i.MX Processors

IPU Usage on IMX6 processor..

mugheesahmed — Wed, 08 May 2013 12:06:08 GMT

Hi, I have some questions regarding IPU.

1. Are the counters mapped to specific pins like DRDY, HSYNC and VSYNC?If yes how this mapping is done? There is some mapping given for asynchronous case but it is also very unclear.

2. In template micrcode memory in SYNC field what does unit# stands for in Sync with unit #1 etc? Do they associate with counters?

3. I want to run a display 800X400 that works with DRDY pin and other data pins instead of VSYNC and HSYNC. I am unable to get anything on DRDY. Can you explain me a simple flow how to do that. I mean how a counter would display waveform for DRDY pin? I'll be grateful if you answer my questions. Thank You.

Re: IPU Usage on IMX6 processor..

karina_valencia — Tue, 28 May 2013 14:46:03 GMT

Re: IPU Usage on IMX6 processor..

KarinaValenciaAguilar May 28, 2013 7:45 AM (in response to Karina Valencia Aguilar)

From Kane:

Hi, I have some questions regarding IPU.

1. Are the counters mapped to specific pins like DRDY, HSYNC and VSYNC?If yes how this mapping is done? There is some mapping given for asynchronous case but it is also very unclear.

[Kane] counters can be used to create synchronous signals such as DRDY,HSYNC and VSYNC. But there is not fixed mapping here. You can use any one of the counter 1 ~counter 8 to create hsync as you like. Then you need to indicate which counter represents the hsync in other register. For example:ipu_write_field(1,IPU_DI0_SYNC_AS_GEN__DI0_VSYNC_SEL, 0x2); //PIN3 as VSYNC ipu_write_field(1,IPU_DI0_GENERAL__DI0_DISP_Y_SEL,0x1);//PIN2 as HSYNCFor DRDY, since it is a data oriented signal, we need to create a timing widow to fetch data from memory through DC, DMFC, idmac and also need to create a waveform for output pin . The data window can be created using one of counter1~10,for example counter 5. And Normally we use PIN15 to indicate the DRDY waveform. So there are two places you need to configure in NEW_DATA microcode event. One is the sync, you need to configure to counter 5. The other is the waveform. DI holds 12 sets of waveforms and you can select one of it.For how to create the DRDY waveform and also for asynchronous case, please refer to chapter 46.5.11.4 of the RM.

2. In template micrcode memory in SYNC field what does unit# stands for in Sync with unit #1 etc? Do they associate with counters?

[Kane]yes. they are associated with the counters. So #1 means the data associated with this command should be synchronized to counter0. If #10, the data should be synchronized to counter10.

Re: IPU Usage on IMX6 processor..

mugheesahmed — Fri, 31 May 2013 06:32:46 GMT

Thanks a lot Karina for the clarification. I am now able to get the Freescale’s LVDS1 display display work with my RTOS. As a second question I want to ask that is there any documentation available for the capacitive touchscreen controller present on this Freescale’s LVDS1 display. I have searched a lot but could not find it. Is this touch controller also from eGalax?

Re: IPU Usage on IMX6 processor..

LinWang — Thu, 06 Jun 2013 05:23:20 GMT

Hi Ahmed,

Please chekc if attached file is enough for you.

Re: IPU Usage on IMX6 processor..

mugheesahmed — Fri, 07 Jun 2013 03:27:55 GMT

Hi Lin,

Thanks Lin for the support. But I require the datasheet of the capacitive touchscreen controller present on this LCD. I guess it is from eGalax or something. Please help on this. Thanks once again.

Regards.

Re: IPU Usage on IMX6 processor..

LinWang — Fri, 07 Jun 2013 05:20:40 GMT

Please find attached file.

or you can contact the vendor HannStar for more detailed materials.