IMX6SLL MMDC LPDDR3 Initialization

vlintilhac — Thu, 11 Mar 2021 21:14:16 GMT

Hi,

I'm trying to configure the MMDC registers for its initialization as described in page 1700 of the IMX6SLLRM. I'm using the W63CH2MBV LPDDR3 chip from Winbond (see attached data sheet).

I have a question concerning the MMDC_MDCTL register, and more especially about the COL [22:20] part.

The Winbond data sheet describes (page 8), that the column address is 10 bits long for the x32 version, but the "least-significant column address C0 is not transmitted on the CA bus, and is implied to be zero".

Should I set the MMDC_MDCTL register for a 9 or 10 bits column?

Best,

Vincent

Re: IMX6SLL MMDC LPDDR3 Initialization

Yuri — Fri, 12 Mar 2021 06:31:54 GMT

@vlintilhac
Hello,

use 10 bits column configuration.

https://community.nxp.com/t5/iMX-and-Vybrid-Support/i-MX6SLL-LPDDR3-Register-Programming-Aid/ta-p/1105286?attachment-id=22617

Regards,
Yuri.

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IMX6SLL MMDC LPDDR3 Initialization

Re: IMX6SLL MMDC LPDDR3 Initialization