i.MX ProcessorsのトピックRe: iMX6DL LPDDR2 Routing Rules

iMX6DL LPDDR2 Routing Rules

tom_perman — Wed, 27 Jan 2021 10:09:54 GMT

Hi,

We are working on a design which uses the iMX6DL with LPDDR2 memory. The Hardware Development Guide (IMX6DQ6SDLHDG) rev 4 gives DDR routing rules in section 3.5. However these appear to be for DDR3. Are there LPDDR2 specific rules?

Thanks,

Tom

Re: iMX6DL LPDDR2 Routing Rules

Yuri — Wed, 27 Jan 2021 11:32:19 GMT

@tom_perman
Hello,

I've sent You some comments directly.

Regards,
Yuri.

Re: iMX6DL LPDDR2 Routing Rules

tom_perman — Fri, 29 Jan 2021 13:00:53 GMT

Hi Yuri,

Thanks for your comments. Is there a reference design available which uses the iMX6DL with LPDDR2? The majority of designs I have come across use DDR3.

Thanks,

Tom

Re: iMX6DL LPDDR2 Routing Rules

Yuri — Mon, 01 Feb 2021 04:57:44 GMT

@tom_perman
Hello,

I used request #00331684 to forward some files. Hope it helps.

Regards,
Yuri.

Re: iMX6DL LPDDR2 Routing Rules

tom_perman — Thu, 04 Feb 2021 12:23:04 GMT

Hi,

Thank you for all your help so far - the information provided has been useful.

I have a final question regarding the length matching. Are there package lengths available for the iMX6DL? This is so that length matching can incorporate both delays due to the PCB and internally within the iMX6DL package. This information has been provided for more modern iMX processors e.g the iMX8MM for matching the LPDDR4 interface.

Thanks,

Tom

Re: iMX6DL LPDDR2 Routing Rules

Yuri — Mon, 15 Feb 2021 04:58:25 GMT

@tom_perman
Hello,

I've sent You some comments.

Regards,
Yuri.