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    <title>i.MX Processors中的主题 Re: MSCMMX6Q NAND boot</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/MSCMMX6Q-NAND-boot/m-p/1221129#M168407</link>
    <description>&lt;P&gt;Hi&amp;nbsp;b45499&lt;/P&gt;&lt;P&gt;For registers&amp;nbsp;BOOT_CFG1 and&amp;nbsp;BOOT_CFG2 t&lt;SPAN&gt;able 5-8&lt;/SPAN&gt;&lt;SPAN class="VIiyi"&gt;&lt;SPAN class="JLqJ4b ChMk0b"&gt;&lt;SPAN&gt;&amp;nbsp;a is the same as table table 8-10.&amp;nbsp;Are my settings correct?&amp;nbsp;&amp;nbsp;FCB were written correctly by kobs-ng?&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;</description>
    <pubDate>Tue, 26 Jan 2021 09:00:47 GMT</pubDate>
    <dc:creator>marcingrzelak</dc:creator>
    <dc:date>2021-01-26T09:00:47Z</dc:date>
    <item>
      <title>MSCMMX6Q NAND boot</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/MSCMMX6Q-NAND-boot/m-p/1219497#M168225</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;I have a custom board with&amp;nbsp;MSCMMX6Q processor and&amp;nbsp;MT29F4G08ABADAWP.&amp;nbsp;&lt;SPAN&gt;I have no problem with booting it from eMMC and SD card.&amp;nbsp;Now trying to boot it from NAND memory - unsuccessfully.&amp;nbsp;I would like to ask you for help.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;My eFuse configuration for i.MX6Q (image&amp;nbsp;in attachment):&lt;BR /&gt;BOOT_CFG1[7] = 0x1;&lt;BR /&gt;BOOT_CFG1[5] = 0x0;&lt;BR /&gt;BOOT_CFG1[5] = 0x0;&lt;BR /&gt;&lt;/SPAN&gt;&lt;SPAN&gt;BOOT_CFG1[4] = 0x0;&lt;BR /&gt;BOOT_CFG1[3:2] = 0x00;&lt;BR /&gt;BOOT_CFG1[1:0] = 0x00;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;BOOT_CFG2[7:5] = 0x00;&lt;BR /&gt;BOOT_CFG2[4:3] = 0x00;&lt;BR /&gt;BOOT_CFG2[2:1] = 0x01;&lt;BR /&gt;BOOT_CFG2[0] = 0x01;&lt;BR /&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Is it correct?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;I wrote u-boot.imx by kobs-ng (logs in file kobs-ng_init_dump.txt).&lt;BR /&gt;I also attach a printed FCB page by nanddump and raw page from u-boot (files nandump.txt and read_nand_raw.txt) and waveform with NANDF_RE_B activity.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&lt;BR /&gt;&lt;/SPAN&gt;&lt;SPAN&gt;Best regards&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Fri, 22 Jan 2021 17:46:53 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/MSCMMX6Q-NAND-boot/m-p/1219497#M168225</guid>
      <dc:creator>marcingrzelak</dc:creator>
      <dc:date>2021-01-22T17:46:53Z</dc:date>
    </item>
    <item>
      <title>Re: MSCMMX6Q NAND boot</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/MSCMMX6Q-NAND-boot/m-p/1220262#M168331</link>
      <description>&lt;P&gt;For the NAND boot you can see RM Chapter 5&lt;BR /&gt;Fusemap&amp;nbsp; Table 5-8. NAND Boot Fusemap&lt;/P&gt;</description>
      <pubDate>Mon, 25 Jan 2021 06:58:41 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/MSCMMX6Q-NAND-boot/m-p/1220262#M168331</guid>
      <dc:creator>Rita_Wang</dc:creator>
      <dc:date>2021-01-25T06:58:41Z</dc:date>
    </item>
    <item>
      <title>Re: MSCMMX6Q NAND boot</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/MSCMMX6Q-NAND-boot/m-p/1221129#M168407</link>
      <description>&lt;P&gt;Hi&amp;nbsp;b45499&lt;/P&gt;&lt;P&gt;For registers&amp;nbsp;BOOT_CFG1 and&amp;nbsp;BOOT_CFG2 t&lt;SPAN&gt;able 5-8&lt;/SPAN&gt;&lt;SPAN class="VIiyi"&gt;&lt;SPAN class="JLqJ4b ChMk0b"&gt;&lt;SPAN&gt;&amp;nbsp;a is the same as table table 8-10.&amp;nbsp;Are my settings correct?&amp;nbsp;&amp;nbsp;FCB were written correctly by kobs-ng?&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Tue, 26 Jan 2021 09:00:47 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/MSCMMX6Q-NAND-boot/m-p/1221129#M168407</guid>
      <dc:creator>marcingrzelak</dc:creator>
      <dc:date>2021-01-26T09:00:47Z</dc:date>
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