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    <title>i.MX ProcessorsのトピックLPDDR4</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/LPDDR4/m-p/1213029#M167889</link>
    <description>&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;We are designing a single board computer using i.MXX8MM Soc.&lt;/P&gt;&lt;P&gt;In our case, we have 2 GB LPDDR4 which is the same as the EVK.&lt;/P&gt;&lt;P&gt;My Stack Up is&lt;/P&gt;&lt;P&gt;Top Layer Signal ( some of DDR data signals)&lt;/P&gt;&lt;P&gt;Mid Layer 1 GND&lt;/P&gt;&lt;P&gt;Mid Layer 2 SİGNAL ( Some of DDR data signals)&lt;/P&gt;&lt;P&gt;Mid Layer 3 POWER(DDR Main Power)&lt;/P&gt;&lt;P&gt;Mid layer 4&amp;nbsp; GND&lt;/P&gt;&lt;P&gt;Mid Layer 5 Signal(DDR Clock)&lt;/P&gt;&lt;P&gt;Mid layer 6 1.8V Power&lt;/P&gt;&lt;P&gt;Bottom Layer Signal&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;From the hardware design guide, what I understand mid layer 2 and mid-layer 5 should have a solid ground plane both above and below.&lt;/P&gt;&lt;P&gt;Q1: Must I provide a ground plane for both mid layer 3 and mid layer 6.&lt;/P&gt;&lt;P&gt;Q2: Is it enough to provide a ground plane just only one side rather than both sides.&lt;/P&gt;&lt;P&gt;Q3: Could you answer the second question for MIPI, USB, PCIe, SDIO, etc.&lt;/P&gt;&lt;P&gt;Q4 : Also , we want to use 4GB LPDDR4 that have same package with EVK LPDDR4(MT53D512M32D2DS-053 AUT: D) Do you suggest any of LPDDR4 (From the NXP community we found that MT53D1024M32D4DT-053 can be fit could you check it?)&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Note : To be more clear I have attached a word file which shows the layer order and routing for LPDDR4 layout.)&lt;/P&gt;</description>
    <pubDate>Mon, 18 Jan 2021 07:01:02 GMT</pubDate>
    <dc:creator>EErdem</dc:creator>
    <dc:date>2021-01-18T07:01:02Z</dc:date>
    <item>
      <title>LPDDR4</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/LPDDR4/m-p/1213029#M167889</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;We are designing a single board computer using i.MXX8MM Soc.&lt;/P&gt;&lt;P&gt;In our case, we have 2 GB LPDDR4 which is the same as the EVK.&lt;/P&gt;&lt;P&gt;My Stack Up is&lt;/P&gt;&lt;P&gt;Top Layer Signal ( some of DDR data signals)&lt;/P&gt;&lt;P&gt;Mid Layer 1 GND&lt;/P&gt;&lt;P&gt;Mid Layer 2 SİGNAL ( Some of DDR data signals)&lt;/P&gt;&lt;P&gt;Mid Layer 3 POWER(DDR Main Power)&lt;/P&gt;&lt;P&gt;Mid layer 4&amp;nbsp; GND&lt;/P&gt;&lt;P&gt;Mid Layer 5 Signal(DDR Clock)&lt;/P&gt;&lt;P&gt;Mid layer 6 1.8V Power&lt;/P&gt;&lt;P&gt;Bottom Layer Signal&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;From the hardware design guide, what I understand mid layer 2 and mid-layer 5 should have a solid ground plane both above and below.&lt;/P&gt;&lt;P&gt;Q1: Must I provide a ground plane for both mid layer 3 and mid layer 6.&lt;/P&gt;&lt;P&gt;Q2: Is it enough to provide a ground plane just only one side rather than both sides.&lt;/P&gt;&lt;P&gt;Q3: Could you answer the second question for MIPI, USB, PCIe, SDIO, etc.&lt;/P&gt;&lt;P&gt;Q4 : Also , we want to use 4GB LPDDR4 that have same package with EVK LPDDR4(MT53D512M32D2DS-053 AUT: D) Do you suggest any of LPDDR4 (From the NXP community we found that MT53D1024M32D4DT-053 can be fit could you check it?)&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Note : To be more clear I have attached a word file which shows the layer order and routing for LPDDR4 layout.)&lt;/P&gt;</description>
      <pubDate>Mon, 18 Jan 2021 07:01:02 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/LPDDR4/m-p/1213029#M167889</guid>
      <dc:creator>EErdem</dc:creator>
      <dc:date>2021-01-18T07:01:02Z</dc:date>
    </item>
    <item>
      <title>Re: LPDDR4</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/LPDDR4/m-p/1213163#M167903</link>
      <description>&lt;P&gt;Hi EErdem&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;1. no&lt;/P&gt;
&lt;P&gt;2. for 2 ,5 layers it is necessary on both sides.&lt;/P&gt;
&lt;P&gt;3. please follow recommendations given in &lt;A id="relatedDocsClick_2" href="https://www.nxp.com/webapp/Download?colCode=IMX8MMHDG" target="_blank" rel="noopener"&gt;&lt;STRONG&gt;i.MX 8M Mini Hardware Developer’s Guide&lt;/STRONG&gt;&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;4. yes MT53D1024M32D4DT-053 can be used.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;/P&gt;</description>
      <pubDate>Mon, 18 Jan 2021 08:48:45 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/LPDDR4/m-p/1213163#M167903</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2021-01-18T08:48:45Z</dc:date>
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