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    <title>i.MX Processors中的主题 Re: DDR Register Programming Aid (RPA) for SCFW 1.7.0</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/DDR-Register-Programming-Aid-RPA-for-SCFW-1-7-0/m-p/1211852#M167775</link>
    <description>&lt;P&gt;In the meantime I tried v15 (the currently released RPA) on the i.MX8QXP MEK with SCFW 1.5.1, everything works.&lt;BR /&gt;Used RPA: MX8QXP_C0_B0_LPDDR4_RPA_1.2GHz_v15.xlsx&lt;/P&gt;&lt;P&gt;I then tried the exact same values from the v15 for SCFW 1.7.0 on the same MEK which resulted in the same error I see on our hardware.&lt;/P&gt;&lt;P&gt;We are blocked now by this issue could you please release the new RPA's needed for SCFW 1.7.0 asap?&lt;/P&gt;&lt;P&gt;Thanks&lt;/P&gt;</description>
    <pubDate>Thu, 14 Jan 2021 16:33:48 GMT</pubDate>
    <dc:creator>philippe_schenk</dc:creator>
    <dc:date>2021-01-14T16:33:48Z</dc:date>
    <item>
      <title>DDR Register Programming Aid (RPA) for SCFW 1.7.0</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/DDR-Register-Programming-Aid-RPA-for-SCFW-1-7-0/m-p/1210487#M167636</link>
      <description>&lt;P&gt;Hi&lt;/P&gt;&lt;P&gt;I cant find the RPA spreadsheet versions that were used to generate RAM-timings for the i.MX 8QM and i.MX 8QXP Mek boards. The version I see in SCFW 1.7.0 are:&lt;/P&gt;&lt;P&gt;i.MX 8QM: Version 23&lt;BR /&gt;i.MX 8QXP: Version 16&lt;/P&gt;&lt;P&gt;However I can't find any references on the publishing pages for the RPA's:&lt;BR /&gt;&lt;A href="https://community.nxp.com/t5/i-MX-Processors-Knowledge-Base/i-MX-8-8X-Family-DDR-Tools-Release/ta-p/1121519" target="_blank" rel="noopener"&gt;https://community.nxp.com/t5/i-MX-Processors-Knowledge-Base/i-MX-8-8X-Family-DDR-Tools-Release/ta-p/1121519&lt;/A&gt;&lt;BR /&gt;&lt;A href="https://community.nxp.com/t5/i-MX-Processors-Knowledge-Base/i-MX8QXP-DXP-DX-DDR-Register-Programming-Aid-RPA/ta-p/1166302" target="_blank" rel="noopener"&gt;https://community.nxp.com/t5/i-MX-Processors-Knowledge-Base/i-MX8QXP-DXP-DX-DDR-Register-Programming-Aid-RPA/ta-p/1166302&lt;/A&gt;&lt;BR /&gt;&lt;A href="https://community.nxp.com/t5/i-MX-Processors-Knowledge-Base/i-MX8QM-DDR-Register-Programming-Aid-RPA/ta-p/1166307" target="_blank" rel="noopener"&gt;https://community.nxp.com/t5/i-MX-Processors-Knowledge-Base/i-MX8QM-DDR-Register-Programming-Aid-RPA/ta-p/1166307&lt;/A&gt;&lt;/P&gt;&lt;P&gt;I am concerned that I have to do the work twice once the new versions get released that they state to be a "have-to" for SCFW 1.7.0&lt;/P&gt;&lt;P&gt;My Questions:&lt;/P&gt;&lt;P&gt;1. Which versions of RPA spreadsheets are needed for i.MX8 QM and i.MX 8QXP/DXP on SCFW 1.7.0?&lt;BR /&gt;2. Are RPA spreadsheets version 15 (i.MX 8QXP/DXP) and version 22 (i.MX8 QM) compatible with SCFW v 1.7.0?&lt;BR /&gt;3. Is it possible to publish those RPA's?&lt;/P&gt;&lt;P&gt;Best Regards&lt;BR /&gt;&lt;SPAN&gt;Philippe Schenker&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Tue, 12 Jan 2021 15:19:23 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/DDR-Register-Programming-Aid-RPA-for-SCFW-1-7-0/m-p/1210487#M167636</guid>
      <dc:creator>philippe_schenk</dc:creator>
      <dc:date>2021-01-12T15:19:23Z</dc:date>
    </item>
    <item>
      <title>Re: DDR Register Programming Aid (RPA) for SCFW 1.7.0</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/DDR-Register-Programming-Aid-RPA-for-SCFW-1-7-0/m-p/1211852#M167775</link>
      <description>&lt;P&gt;In the meantime I tried v15 (the currently released RPA) on the i.MX8QXP MEK with SCFW 1.5.1, everything works.&lt;BR /&gt;Used RPA: MX8QXP_C0_B0_LPDDR4_RPA_1.2GHz_v15.xlsx&lt;/P&gt;&lt;P&gt;I then tried the exact same values from the v15 for SCFW 1.7.0 on the same MEK which resulted in the same error I see on our hardware.&lt;/P&gt;&lt;P&gt;We are blocked now by this issue could you please release the new RPA's needed for SCFW 1.7.0 asap?&lt;/P&gt;&lt;P&gt;Thanks&lt;/P&gt;</description>
      <pubDate>Thu, 14 Jan 2021 16:33:48 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/DDR-Register-Programming-Aid-RPA-for-SCFW-1-7-0/m-p/1211852#M167775</guid>
      <dc:creator>philippe_schenk</dc:creator>
      <dc:date>2021-01-14T16:33:48Z</dc:date>
    </item>
    <item>
      <title>Re: DDR Register Programming Aid (RPA) for SCFW 1.7.0</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/DDR-Register-Programming-Aid-RPA-for-SCFW-1-7-0/m-p/1212671#M167837</link>
      <description>&lt;P&gt;Hi Philippe,&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;For the moment the latest RPAs (aligned to SCFW 1.7.0) are not released publicly yet as the engineering teams are working with marketing on communication.&amp;nbsp; I cannot speak to the timeline or ETA when the RPAs will be released.&lt;/P&gt;
&lt;P&gt;In the meantime, FWIW, we re-pro'd the issue why SCFW 1.7.0 does not work with the previous RPA/DCD (QXP v15). This line is the culprit:&lt;/P&gt;
&lt;P&gt;DATA 4 0xff190000 0x00000CC8 /* DRC0 bringup */&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Sorry for any inconvenience that this may cause you.&lt;/P&gt;
&lt;P&gt;Regards,&lt;/P&gt;
&lt;P&gt;Israel H.&lt;/P&gt;</description>
      <pubDate>Fri, 15 Jan 2021 23:11:55 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/DDR-Register-Programming-Aid-RPA-for-SCFW-1-7-0/m-p/1212671#M167837</guid>
      <dc:creator>nxf63675</dc:creator>
      <dc:date>2021-01-15T23:11:55Z</dc:date>
    </item>
    <item>
      <title>Re: DDR Register Programming Aid (RPA) for SCFW 1.7.0</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/DDR-Register-Programming-Aid-RPA-for-SCFW-1-7-0/m-p/1216924#M168018</link>
      <description>&lt;P&gt;Hi Israel,&lt;/P&gt;&lt;P&gt;Thanks for your information. I spent now (too much) time with that issue and I just wanted to mention for everyone else that steps by this issue, that also some other register changes not only&lt;BR /&gt;&lt;BR /&gt;DATA 4 0xff190000 0x00000CC8 /* DRC0 bringup */&lt;BR /&gt;&lt;BR /&gt;are needed. Just deleting that line alone is not helping (but it is necessary with some other bit-flips).&lt;BR /&gt;&lt;BR /&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Philippe&lt;/P&gt;</description>
      <pubDate>Tue, 19 Jan 2021 13:54:10 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/DDR-Register-Programming-Aid-RPA-for-SCFW-1-7-0/m-p/1216924#M168018</guid>
      <dc:creator>philippe_schenk</dc:creator>
      <dc:date>2021-01-19T13:54:10Z</dc:date>
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