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    <title>i.MX ProcessorsのトピックRe: i.MX6ULL  DRAM_VREF</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6ULL-DRAM-VREF/m-p/1211721#M167760</link>
    <description>&lt;P&gt;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/172436"&gt;@ban45&lt;/a&gt;&amp;nbsp;&lt;BR /&gt;Hello,&lt;BR /&gt;&lt;BR /&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&amp;nbsp; Generally both variants (1.5kΩ ± 0.1% and 1.54kΩ ± 0.5%) are acceptable.&lt;BR /&gt;The variant 1.5kΩ ± 0.5% also is possible, but 0.1% resistors accuracy is more preferable.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Regards,&lt;BR /&gt;Yuri.&lt;/P&gt;</description>
    <pubDate>Thu, 14 Jan 2021 10:48:57 GMT</pubDate>
    <dc:creator>Yuri</dc:creator>
    <dc:date>2021-01-14T10:48:57Z</dc:date>
    <item>
      <title>i.MX6ULL  DRAM_VREF</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6ULL-DRAM-VREF/m-p/1211651#M167748</link>
      <description>&lt;P&gt;Hi&lt;/P&gt;&lt;DIV class="ccvoYb"&gt;&lt;DIV class="AxqVh"&gt;&lt;DIV class="OPPzxe"&gt;&lt;DIV class="dePhmb"&gt;&lt;DIV class="eyKpYb"&gt;&lt;DIV class="J0lOec"&gt;&lt;SPAN class="VIiyi"&gt;&lt;SPAN class="JLqJ4b ChMk0b"&gt;&lt;SPAN&gt;About the voltage divider resistance of DRAM_VREF.&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV class="J0lOec"&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV class="UdTY9 Yb6eTe"&gt;&lt;DIV class="kO6q6e"&gt;MX 6ULL Applications Processors for Industrial Products, Rev. 1.2, 11/2017 &lt;SPAN&gt;stated that it was 1.5kΩ ± 0.1%.&lt;/SPAN&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;DIV class="BdDRKe"&gt;&lt;DIV class="aJIq1d DSmisd"&gt;&lt;DIV&gt;&amp;nbsp;&lt;/DIV&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;DIV&gt;&lt;DIV&gt;Hardware Development Guide for the i.MX 6ULL Applications Processor, Rev. 0, 08/2016　&lt;SPAN&gt;stated that it was 1.54kΩ ± 0.5%.&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;①What is the difference in resistance?&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV&gt;&lt;SPAN&gt;②&lt;/SPAN&gt;&lt;SPAN&gt;What happens with different tolerances?&lt;/SPAN&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;DIV class="ZyvIDe"&gt;&lt;DIV class="a8FIud"&gt;➂Is it okay to use 1.5kΩ ± 0.5%?&lt;/DIV&gt;&lt;DIV class="a8FIud"&gt;&lt;SPAN&gt;Please tell me about ① ～ ③.&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV class="a8FIud"&gt;&amp;nbsp;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;P&gt;best regard&lt;/P&gt;</description>
      <pubDate>Thu, 14 Jan 2021 09:11:57 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX6ULL-DRAM-VREF/m-p/1211651#M167748</guid>
      <dc:creator>ban45</dc:creator>
      <dc:date>2021-01-14T09:11:57Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX6ULL  DRAM_VREF</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6ULL-DRAM-VREF/m-p/1211721#M167760</link>
      <description>&lt;P&gt;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/172436"&gt;@ban45&lt;/a&gt;&amp;nbsp;&lt;BR /&gt;Hello,&lt;BR /&gt;&lt;BR /&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&amp;nbsp; Generally both variants (1.5kΩ ± 0.1% and 1.54kΩ ± 0.5%) are acceptable.&lt;BR /&gt;The variant 1.5kΩ ± 0.5% also is possible, but 0.1% resistors accuracy is more preferable.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Regards,&lt;BR /&gt;Yuri.&lt;/P&gt;</description>
      <pubDate>Thu, 14 Jan 2021 10:48:57 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX6ULL-DRAM-VREF/m-p/1211721#M167760</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2021-01-14T10:48:57Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX6ULL  DRAM_VREF</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6ULL-DRAM-VREF/m-p/1211988#M167782</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;What is the difference between 1.5kΩ ± 0.1% and 1.54kΩ ± 0.5%?&lt;/P&gt;&lt;P&gt;I couldn't understand why 0.1% was good by looking at the data sheet.&lt;BR /&gt;Could you tell me?&lt;/P&gt;&lt;P&gt;best regard&lt;/P&gt;</description>
      <pubDate>Thu, 14 Jan 2021 23:59:37 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX6ULL-DRAM-VREF/m-p/1211988#M167782</guid>
      <dc:creator>ban45</dc:creator>
      <dc:date>2021-01-14T23:59:37Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX6ULL  DRAM_VREF</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX6ULL-DRAM-VREF/m-p/1212297#M167806</link>
      <description>&lt;P&gt;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/172436"&gt;@ban45&lt;/a&gt;&amp;nbsp;&lt;BR /&gt;Hello,&lt;/P&gt;
&lt;P&gt;&amp;nbsp; "Using resistors with recommended tolerances ensures the ± 2% DDR_VREF tolerance &lt;BR /&gt;(per the DDR3 specification) is maintained when two DDR3 ICs plus the i.MX 6ULL are &lt;BR /&gt;drawing current on the resistor divider".&lt;/P&gt;
&lt;P&gt;&amp;nbsp; You may look at the following general considerations:&lt;/P&gt;
&lt;P&gt;&lt;A href="https://www.maximintegrated.com/en/design/technical-documents/tutorials/7/719.html" target="_blank"&gt;https://www.maximintegrated.com/en/design/technical-documents/tutorials/7/719.html&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;In particular: &lt;I&gt;Figure 4. This simple resistor-divider analogy represents a voltage reference &lt;BR /&gt;unloaded (A) and loaded (B).&lt;/I&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Regards,&lt;BR /&gt;Yuri.&lt;/P&gt;</description>
      <pubDate>Fri, 15 Jan 2021 09:44:00 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX6ULL-DRAM-VREF/m-p/1212297#M167806</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2021-01-15T09:44:00Z</dc:date>
    </item>
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