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    <title>topic Which one is right..? in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Which-one-is-right/m-p/228812#M16766</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello...?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I am on working on image enhancement of i.MX6Q camera interfaces.&lt;/P&gt;&lt;P&gt;I have found some confusing on freescale's documents.&lt;/P&gt;&lt;P&gt;There are tow documents.&lt;/P&gt;&lt;P&gt;1. i.MX 6Dual/6Quad Linux Reference Manual, Rev. L3.0.35_1.1.0, 01/2013&lt;/P&gt;&lt;P&gt;2. i.MX 6Dual/6Quad Applications Processor Reference Manual, Rev. 0, 11/2012&lt;/P&gt;&lt;P&gt;But the explanation of IPU block is different by each other,&lt;/P&gt;&lt;P&gt;especially &lt;STRONG&gt;ISP&lt;/STRONG&gt; which is on between CSI and IDMAC described at Linux Reference Manual.&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 10pt; line-height: 1.5em;"&gt;Can you let me know which one is right.. or some differences by Chip version or Chip series..?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;Thank you in advance.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Mach.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Here it is the two block diagrams.&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="IPU_Linux_RM.JPG"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/119182iA6E58998F4C16A9C/image-size/large?v=v2&amp;amp;px=999" role="button" title="IPU_Linux_RM.JPG" alt="IPU_Linux_RM.JPG" /&gt;&lt;/span&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="IPU_AP_RM.JPG"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/119183i8BC7F7B356AE12D0/image-size/large?v=v2&amp;amp;px=999" role="button" title="IPU_AP_RM.JPG" alt="IPU_AP_RM.JPG" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Mon, 18 Mar 2013 11:38:43 GMT</pubDate>
    <dc:creator>machlee</dc:creator>
    <dc:date>2013-03-18T11:38:43Z</dc:date>
    <item>
      <title>Which one is right..?</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Which-one-is-right/m-p/228812#M16766</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello...?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I am on working on image enhancement of i.MX6Q camera interfaces.&lt;/P&gt;&lt;P&gt;I have found some confusing on freescale's documents.&lt;/P&gt;&lt;P&gt;There are tow documents.&lt;/P&gt;&lt;P&gt;1. i.MX 6Dual/6Quad Linux Reference Manual, Rev. L3.0.35_1.1.0, 01/2013&lt;/P&gt;&lt;P&gt;2. i.MX 6Dual/6Quad Applications Processor Reference Manual, Rev. 0, 11/2012&lt;/P&gt;&lt;P&gt;But the explanation of IPU block is different by each other,&lt;/P&gt;&lt;P&gt;especially &lt;STRONG&gt;ISP&lt;/STRONG&gt; which is on between CSI and IDMAC described at Linux Reference Manual.&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-size: 10pt; line-height: 1.5em;"&gt;Can you let me know which one is right.. or some differences by Chip version or Chip series..?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;Thank you in advance.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Mach.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Here it is the two block diagrams.&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="IPU_Linux_RM.JPG"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/119182iA6E58998F4C16A9C/image-size/large?v=v2&amp;amp;px=999" role="button" title="IPU_Linux_RM.JPG" alt="IPU_Linux_RM.JPG" /&gt;&lt;/span&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="IPU_AP_RM.JPG"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/119183i8BC7F7B356AE12D0/image-size/large?v=v2&amp;amp;px=999" role="button" title="IPU_AP_RM.JPG" alt="IPU_AP_RM.JPG" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 18 Mar 2013 11:38:43 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Which-one-is-right/m-p/228812#M16766</guid>
      <dc:creator>machlee</dc:creator>
      <dc:date>2013-03-18T11:38:43Z</dc:date>
    </item>
    <item>
      <title>Re: Which one is right..?</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Which-one-is-right/m-p/228813#M16767</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;This is old story about the ISP :&lt;/P&gt;&lt;P&gt;On iMX5x IPU, there is a module called ISP, which was not fully verified, so in the iMX5x&lt;/P&gt;&lt;P&gt;documentation, the ISP section had been removed.&amp;nbsp; And on iMX6, the ISP module had been&lt;/P&gt;&lt;P&gt;removed.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 20 Mar 2013 03:32:22 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Which-one-is-right/m-p/228813#M16767</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2013-03-20T03:32:22Z</dc:date>
    </item>
    <item>
      <title>Re: Which one is right..?</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Which-one-is-right/m-p/228814#M16768</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Thanks a lot&amp;nbsp; :-)&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 20 Mar 2013 04:25:52 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Which-one-is-right/m-p/228814#M16768</guid>
      <dc:creator>machlee</dc:creator>
      <dc:date>2013-03-20T04:25:52Z</dc:date>
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