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    <title>i.MX Processorsのトピックschematics review</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/schematics-review/m-p/1208056#M167397</link>
    <description>&lt;P&gt;Hi&amp;nbsp;&lt;/P&gt;&lt;P&gt;We are using imx6ul in one of our application while referring to EVK we saw some circuits in Imx6UL EVK. same attached for your reference. we don't have any battery in our project. No need of sleep mode, deep sleep etc.&lt;/P&gt;&lt;P&gt;I have following queries onEVK&amp;nbsp; design.&lt;/P&gt;&lt;P&gt;1. PMIC_STBY_REQ what is the need of this signal. is it mandatory to use?&lt;/P&gt;&lt;P&gt;2.PMIC_ON_REQ what is the need of this signal. is it mandatary to use?&lt;/P&gt;&lt;P&gt;3. GPIO_DVFS what is the need of this signal.Is it Mandatory to use?&lt;/P&gt;&lt;P&gt;4. can't we give fixed nominal 1.275V to VDD_ARM_SOC_IN?&lt;/P&gt;&lt;P&gt;Regards&lt;/P&gt;&lt;P&gt;shivakumar L V&lt;/P&gt;</description>
    <pubDate>Thu, 07 Jan 2021 06:52:36 GMT</pubDate>
    <dc:creator>shivakumar1</dc:creator>
    <dc:date>2021-01-07T06:52:36Z</dc:date>
    <item>
      <title>schematics review</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/schematics-review/m-p/1208056#M167397</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;/P&gt;&lt;P&gt;We are using imx6ul in one of our application while referring to EVK we saw some circuits in Imx6UL EVK. same attached for your reference. we don't have any battery in our project. No need of sleep mode, deep sleep etc.&lt;/P&gt;&lt;P&gt;I have following queries onEVK&amp;nbsp; design.&lt;/P&gt;&lt;P&gt;1. PMIC_STBY_REQ what is the need of this signal. is it mandatory to use?&lt;/P&gt;&lt;P&gt;2.PMIC_ON_REQ what is the need of this signal. is it mandatary to use?&lt;/P&gt;&lt;P&gt;3. GPIO_DVFS what is the need of this signal.Is it Mandatory to use?&lt;/P&gt;&lt;P&gt;4. can't we give fixed nominal 1.275V to VDD_ARM_SOC_IN?&lt;/P&gt;&lt;P&gt;Regards&lt;/P&gt;&lt;P&gt;shivakumar L V&lt;/P&gt;</description>
      <pubDate>Thu, 07 Jan 2021 06:52:36 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/schematics-review/m-p/1208056#M167397</guid>
      <dc:creator>shivakumar1</dc:creator>
      <dc:date>2021-01-07T06:52:36Z</dc:date>
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    <item>
      <title>Re: schematics review</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/schematics-review/m-p/1208709#M167455</link>
      <description>&lt;P&gt;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/180452"&gt;@shivakumar1&lt;/a&gt;&amp;nbsp;&lt;BR /&gt;Hello,&lt;/P&gt;
&lt;P&gt;&amp;nbsp; The circuits, You mentioned, are intended for quick discharging during &lt;BR /&gt;sequence power off -&amp;gt; on. This allows to avoid power up sequence violations.&lt;BR /&gt;Also, from i.MX 6UltraLite EVK Board Hardware User’s Guide (Rev. 1, 03/2016):&lt;BR /&gt;"It is important that system reset should be power down and then power on, which&lt;BR /&gt;will avoid boot failure caused by DVFS or DRAM (LPDDR2 if used)". &lt;BR /&gt;&lt;BR /&gt;So, the design solutions of the EVK may be highly recommended.&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Regards,&lt;BR /&gt;Yuri.&lt;/P&gt;</description>
      <pubDate>Fri, 08 Jan 2021 05:18:59 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/schematics-review/m-p/1208709#M167455</guid>
      <dc:creator>Yuri</dc:creator>
      <dc:date>2021-01-08T05:18:59Z</dc:date>
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