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    <title>topic Re: iMX6DL 2DDR configration in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/iMX6DL-2DDR-configration/m-p/1202762#M166818</link>
    <description>&lt;P&gt;Hi,&lt;/P&gt;
&lt;P&gt;&amp;gt;&amp;gt;Is that ok to leave unconnected?&lt;/P&gt;
&lt;P&gt;yes, that is.&lt;/P&gt;
&lt;P&gt;Leave them floating,please!&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Have a nice day!&lt;/P&gt;
&lt;P&gt;B.R,&lt;/P&gt;
&lt;P&gt;weidong&lt;/P&gt;</description>
    <pubDate>Tue, 22 Dec 2020 04:34:56 GMT</pubDate>
    <dc:creator>weidong_sun</dc:creator>
    <dc:date>2020-12-22T04:34:56Z</dc:date>
    <item>
      <title>iMX6DL 2DDR configration</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/iMX6DL-2DDR-configration/m-p/1202726#M166815</link>
      <description>&lt;P&gt;Hi, community.&lt;/P&gt;&lt;P&gt;We are going to use 2 DDR with i.MX6DualLite.&lt;/P&gt;&lt;P&gt;At that time, what should we do for upper 32 bits HW pins?&lt;BR /&gt;Is that ok to leave unconnected?&lt;/P&gt;&lt;P&gt;DATA32~63&lt;BR /&gt;SDQ4~7 P/N&lt;BR /&gt;DQM4~7&lt;BR /&gt;SDCLK_1 P/N&lt;/P&gt;&lt;P&gt;Thank you.&lt;/P&gt;</description>
      <pubDate>Tue, 22 Dec 2020 03:11:50 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/iMX6DL-2DDR-configration/m-p/1202726#M166815</guid>
      <dc:creator>Anonymous</dc:creator>
      <dc:date>2020-12-22T03:11:50Z</dc:date>
    </item>
    <item>
      <title>Re: iMX6DL 2DDR configration</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/iMX6DL-2DDR-configration/m-p/1202762#M166818</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;
&lt;P&gt;&amp;gt;&amp;gt;Is that ok to leave unconnected?&lt;/P&gt;
&lt;P&gt;yes, that is.&lt;/P&gt;
&lt;P&gt;Leave them floating,please!&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Have a nice day!&lt;/P&gt;
&lt;P&gt;B.R,&lt;/P&gt;
&lt;P&gt;weidong&lt;/P&gt;</description>
      <pubDate>Tue, 22 Dec 2020 04:34:56 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/iMX6DL-2DDR-configration/m-p/1202762#M166818</guid>
      <dc:creator>weidong_sun</dc:creator>
      <dc:date>2020-12-22T04:34:56Z</dc:date>
    </item>
    <item>
      <title>Re: iMX6DL 2DDR configration</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/iMX6DL-2DDR-configration/m-p/1202766#M166819</link>
      <description>&lt;P&gt;Hi,&amp;nbsp;&lt;SPAN&gt;weidong&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;Thank you for your reply.&lt;/P&gt;&lt;P&gt;I see.&lt;/P&gt;&lt;P&gt;Then, Power configuration (VDDARMxx_xx Power Connections) is same between i.MX6 DualLite &amp;amp; i.MX6 Solo.&lt;BR /&gt;So if we use only 2 DDR, we can use completly same board layout pattern for DualLite &amp;amp; Solo.&lt;/P&gt;&lt;P&gt;Is my understanding correct?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thanks in advance.&lt;/P&gt;</description>
      <pubDate>Tue, 22 Dec 2020 04:42:03 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/iMX6DL-2DDR-configration/m-p/1202766#M166819</guid>
      <dc:creator>Anonymous</dc:creator>
      <dc:date>2020-12-22T04:42:03Z</dc:date>
    </item>
    <item>
      <title>Re: iMX6DL 2DDR configration</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/iMX6DL-2DDR-configration/m-p/1202799#M166824</link>
      <description>&lt;P&gt;&amp;gt;&amp;gt;Is my understanding correct?&lt;/P&gt;
&lt;P&gt;yes, correct.&lt;/P&gt;
&lt;P&gt;B.R,&lt;/P&gt;
&lt;P&gt;Weidong&lt;/P&gt;</description>
      <pubDate>Tue, 22 Dec 2020 06:00:01 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/iMX6DL-2DDR-configration/m-p/1202799#M166824</guid>
      <dc:creator>weidong_sun</dc:creator>
      <dc:date>2020-12-22T06:00:01Z</dc:date>
    </item>
    <item>
      <title>Re: iMX6DL 2DDR configration</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/iMX6DL-2DDR-configration/m-p/1202813#M166825</link>
      <description>&lt;P&gt;Hi, Weidong.&lt;/P&gt;&lt;P&gt;Oh, that's good.&lt;BR /&gt;We can just design one board pattern and try 2 types of i.MX.&lt;/P&gt;&lt;P&gt;Thank you so much!!&lt;/P&gt;</description>
      <pubDate>Tue, 22 Dec 2020 06:07:41 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/iMX6DL-2DDR-configration/m-p/1202813#M166825</guid>
      <dc:creator>Anonymous</dc:creator>
      <dc:date>2020-12-22T06:07:41Z</dc:date>
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