i.MX ProcessorsのトピックDDR3 Swapping data lines and yocto configuration

DDR3 Swapping data lines and yocto configuration

juanalbertogonz — Fri, 04 Dec 2020 15:11:35 GMT

Hi,

we are working with a custom board, that implemented data lines swapping, the note says target DDR IC register read value must be transposed according to the data line swapping.

Where should I look to set this transpose value into the yocto configuration? Or how this transpose is configured?

Re: DDR3 Swapping data lines and yocto configuration

jamesbone — Fri, 04 Dec 2020 22:56:48 GMT

There is no need for additional mapping or software reconfiguration, as

it is done automatically. Bit swapping is described in sect.3.5.1 Swapping data lines IMX6DQ6SDLHDG

Re: DDR3 Swapping data lines and yocto configuration

igorpadykov — Sat, 05 Dec 2020 04:27:05 GMT

Hi juanalbertogonz

regarding " target DDR IC register read value must be transposed according to the data line swapping." -

this is needed for reading MR registers of ddr part. For DDR3(L) memories such reading is not

used. So this may be ignored for DDR3(L).

Best regards
igor

Re: DDR3 Swapping data lines and yocto configuration

juanalbertogonz — Mon, 07 Dec 2020 13:40:58 GMT

Thanks for the answer

Re: DDR3 Swapping data lines and yocto configuration.

juanalbertogonz — Mon, 07 Dec 2020 13:41:51 GMT

Thanks for the answer