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    <title>topic Re: i.MX8QXP LPDDR4 issues in high temperature in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/i-MX8QXP-LPDDR4-issues-in-high-temperature/m-p/1190601#M165679</link>
    <description>&lt;P&gt;Hi jran&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;gt;..Could one assume that this issue will be gone when moving on to C0 silicon?..&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;this is cause by rev.B0 erratum e50125 "DRAM: Controller automatic derating logic may not work as intended.."&lt;/P&gt;
&lt;P&gt;&lt;A id="relatedDocsClick_2" href="https://www.nxp.com/docs/en/errata/IMX8X_0N95W.pdf" target="_blank" rel="noopener"&gt;&lt;STRONG&gt;Mask Set Errata for Mask 0N95W-B0 Silicon&lt;/STRONG&gt;&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;It is fixed in rev.C0 as described in &lt;A id="relatedDocsClick_1" href="https://www.nxp.com/docs/en/errata/IMX8X_C0_0N99Z_ER.pdf" target="_blank" rel="noopener"&gt;&lt;STRONG&gt;Mask Set Errata for Mask 0N99Z-C0 Silicon&lt;/STRONG&gt;&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;&lt;A id="relatedDocsClick_4" href="https://www.nxp.com/docs/en/application-note/AN12770.pdf" target="_blank" rel="noopener"&gt;&lt;STRONG&gt;i.MX 8X C0 Migration Guide Migrating from i.MX 8X B0 to i.MX 8X C0&lt;/STRONG&gt;&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;/P&gt;</description>
    <pubDate>Mon, 30 Nov 2020 04:06:07 GMT</pubDate>
    <dc:creator>igorpadykov</dc:creator>
    <dc:date>2020-11-30T04:06:07Z</dc:date>
    <item>
      <title>i.MX8QXP LPDDR4 issues in high temperature</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX8QXP-LPDDR4-issues-in-high-temperature/m-p/1188300#M165440</link>
      <description>&lt;P&gt;While doing climate testing of our i.MX8QXP product, some issues have come up.&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;When SoC reports temperature above +85°C we started seeing glitches on the screen, and after some time Weston and/or any running application crashes with segfault.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;We are running SCFW porting kit 1.6.0 with DCD Cfg settings generated from latest v15 of DDR Configuration spreadsheet, and linux-fslc-imx 5.4.74.&lt;BR /&gt;CPU revision is B0. Running 2GB LPDDR4 at 1200 MHz.&amp;nbsp;&lt;/P&gt;&lt;P&gt;We have run DDR stress test tool in +90°C surrounding temperature at 1200-1300 MHz without issues. So the memory bus itself seems stable.&lt;/P&gt;&lt;P&gt;What does seem to solve the issue is to select "Apply maximum de-rate timings" in the configuration tool, then the board seems to be working fine even at +95°C SoC temperature.&lt;BR /&gt;We tried only disabling the automatic de-rate feature, but that made no improvement. Still the same glitching and crashing, only that the board no longer booted at high temperature.&lt;/P&gt;&lt;P&gt;What are the drawbacks of using maximum de-rate timings? Higher current consumption?&lt;/P&gt;&lt;P&gt;Also, are there any settings which can be tweaked for the de-rating? Since using maximum values at all times solves the problem, I'd guess that more de-rating would also work.&lt;/P&gt;&lt;P&gt;We have set&amp;nbsp;T_RFC_NOM_X32 to 3904 as per the SDRAM datasheet nominal tREFiab. But of course the datasheet specifies much lower values for temperature above +85°C. Shouldn't this be considered anywhere?&lt;/P&gt;&lt;P&gt;Could one assume that this issue will be gone when moving on to C0 silicon?&lt;/P&gt;</description>
      <pubDate>Tue, 24 Nov 2020 15:46:28 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX8QXP-LPDDR4-issues-in-high-temperature/m-p/1188300#M165440</guid>
      <dc:creator>jran</dc:creator>
      <dc:date>2020-11-24T15:46:28Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX8QXP LPDDR4 issues in high temperature</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX8QXP-LPDDR4-issues-in-high-temperature/m-p/1188727#M165470</link>
      <description>&lt;P&gt;After doing some more reading I found that the de-rating settings comes from the SDRAM, register MR4.&lt;BR /&gt;So there are basically no settings for this, then. It should just work.&lt;/P&gt;&lt;P&gt;But why doesn't it? Are there more issues with the B0 silicon than what the Errata says (states that the issue is only if *startup* temperature is high)?&lt;/P&gt;&lt;P&gt;And the main question remains, what are the drawbacks of using maximum refresh rate?&lt;/P&gt;</description>
      <pubDate>Wed, 25 Nov 2020 08:01:30 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX8QXP-LPDDR4-issues-in-high-temperature/m-p/1188727#M165470</guid>
      <dc:creator>jran</dc:creator>
      <dc:date>2020-11-25T08:01:30Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX8QXP LPDDR4 issues in high temperature</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX8QXP-LPDDR4-issues-in-high-temperature/m-p/1190601#M165679</link>
      <description>&lt;P&gt;Hi jran&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;gt;..Could one assume that this issue will be gone when moving on to C0 silicon?..&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;this is cause by rev.B0 erratum e50125 "DRAM: Controller automatic derating logic may not work as intended.."&lt;/P&gt;
&lt;P&gt;&lt;A id="relatedDocsClick_2" href="https://www.nxp.com/docs/en/errata/IMX8X_0N95W.pdf" target="_blank" rel="noopener"&gt;&lt;STRONG&gt;Mask Set Errata for Mask 0N95W-B0 Silicon&lt;/STRONG&gt;&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;It is fixed in rev.C0 as described in &lt;A id="relatedDocsClick_1" href="https://www.nxp.com/docs/en/errata/IMX8X_C0_0N99Z_ER.pdf" target="_blank" rel="noopener"&gt;&lt;STRONG&gt;Mask Set Errata for Mask 0N99Z-C0 Silicon&lt;/STRONG&gt;&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;&lt;A id="relatedDocsClick_4" href="https://www.nxp.com/docs/en/application-note/AN12770.pdf" target="_blank" rel="noopener"&gt;&lt;STRONG&gt;i.MX 8X C0 Migration Guide Migrating from i.MX 8X B0 to i.MX 8X C0&lt;/STRONG&gt;&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;/P&gt;</description>
      <pubDate>Mon, 30 Nov 2020 04:06:07 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX8QXP-LPDDR4-issues-in-high-temperature/m-p/1190601#M165679</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2020-11-30T04:06:07Z</dc:date>
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