topic JTAG Debuger Selection For i.MX 8M Mini in i.MX Processors

JTAG Debuger Selection For i.MX 8M Mini

milav_soni — Tue, 03 Nov 2020 12:43:20 GMT

Hello Team,

This is Milav Soni From Teq Diligent.

I have decided to purchase i.MX 8M Mini EVK for internal development.

But Before that I want to confirm from JTAG Debugging side.

I want to select JTAG Debugger for i.MX 8M Mini EVK, can you please suggest me any JTAG debugger?

Thank You

Re: JTAG Debuger Selection For i.MX 8M Mini

matt67 — Tue, 03 Nov 2020 12:56:01 GMT

Hi,

I work with imx8m mini EVK and custom board design, for JTAG I use J-Link Pro from Segger to debug the Cortex-M4 and occasionaly to read registers or memory when attached to Cortex-A53 (no Linux debug yet needed).

Toolchain and workbench is IAR, we had to patch it with NXP configs files.

On EVK board you need an adapter to connect from 20 to 10 pins:

https://www.mouser.fr/ProductDetail/Olimex-Ltd/ARM-JTAG-20-10?qs=DUTFWDROaMbVQp3WoAdijQ%3D%3D&gclid=CjwKCAiAnIT9BRAmEiwANaoE1YKoso911itDs7prVBnetJXsoA6W1cpQuzfB2EX6yfxEsOcYGlhvVRoCTxsQAvD_BwE

On custom design I have proprietary tests point adapter to connect.

Re: JTAG Debuger Selection For i.MX 8M Mini

Bio_TICFSL — Tue, 03 Nov 2020 13:52:40 GMT

Hello Milav,

According to section 2.14 [JTAG connector (J902)] of the EVK Board Hardware User's Guide:
The i.MX 8M Mini applications processor has five JATG signals on the dedicated pins and one hardware

reset input signal (POR_B). Those signals are directly connected to the 10-pin 1.27-mm JTAG connector

J902. The five JTAG signals used by the processor are:

• JTAG_TCK—TAP clock

• JTAG_TMS—TAP machine state

• JTAG_TDI—TAP data in

• JTAG_TDO—TAP data out

• JTAG_nTRST—TAP reset request (active low)

https://www.nxp.com/webapp/Download?colCode=IMX8MMEVKHUG

The JTAG connector is based on standard ARM 10 pins Cortex Debug Connector.

http://infocenter.arm.com/help/topic/com.arm.doc.faqs/attached/13634/cortex_debug_connectors.pdf

http://www2.keil.com/coresight/coresight-connectors/

Regards

Re: JTAG Debuger Selection For i.MX 8M Mini

Pi93 — Tue, 04 May 2021 16:31:18 GMT

Dear @matt67 ,

I am using the VAR-SOM-MX8M-MINI as System on Module with the i.MX 8M Mini and custom carrier board design. For JTAG I also use the J-Link Pro from Segger, but instead of IAR IDE I use Eclipse IDE.

Can you share your settings for the Cortex-A53 and Cortex-M4? Did you use any script or settings file(s)?

Here is my output for Cortex-A53 (Cortex-M4 not tested yet):

SEGGER J-Link GDB Server V6.88a Command Line Version

JLinkARM.dll V6.88a (DLL compiled Nov 18 2020 16:08:10)

Command line: -if jtag -device Cortex-A53 -endian little -speed 1000 -port 2331 -swoport 2332 -telnetport 2333 -vd -noreset -noir -localhostonly 1 -singlerun -strict -timeout 0 -nogui
-----GDB Server start settings-----
GDBInit file: none
GDB Server Listening port: 2331
SWO raw output listening port: 2332
Terminal I/O port: 2333
Accept remote connection: localhost only
Generate logfile: off
Verify download: on
Init regs on start: off
Silent mode: off
Single run mode: on
Target connection timeout: 0 ms
------J-Link related settings------
J-Link Host interface: USB
J-Link script: none
J-Link settings file: none
------Target related settings------
Target device: Cortex-A53
Target interface: JTAG
Target interface speed: 1000kHz
Target endian: little

Connecting to J-Link...
J-Link is connected.
Firmware: J-Link Pro V4 compiled Nov 12 2020 10:08:03
Hardware: V4.00
S/N: 174505527
Feature(s): RDI, FlashBP, FlashDL, JFlash, GDB
Checking target voltage...
Target voltage: 3.32 V
Listening on TCP/IP port 2331
Connecting to target...

J-Link found 1 JTAG device, Total IRLen = 4
JTAG ID: 0x5BA00477 (Cortex-A53)
Connected to target
Waiting for GDB connection...Connected to 127.0.0.1
Reading all registers
Read 4 bytes @ address 0x00013DDC (Data = 0x17FFFFFF)
Read 4 bytes @ address 0x00013DD8 (Data = 0xD503207F)
Read 4 bytes @ address 0x00013DDC (Data = 0x17FFFFFF)
Received monitor command: speed 1000
Target interface speed set to 1000 kHz
Received monitor command: speed auto
Select auto target interface speed (4000 kHz)
Received monitor command: flash breakpoints 1
Flash breakpoints enabled
Received monitor command: semihosting enable
Semi-hosting enabled (SVC Addr = 0x08)
Received monitor command: semihosting IOClient 1
Semihosting I/O set to TELNET Client
WARNING: Failed to read memory @ address 0x00406BA8
Read 4 bytes @ address 0x00013DDC (Data = 0x17FFFFFF)
Read 4 bytes @ address 0x00013DD8 (Data = 0xD503207F)
Read 4 bytes @ address 0x00013DDC (Data = 0x17FFFFFF)
WARNING: Failed to read memory @ address 0x00402DD0
WARNING: Failed to read memory @ address 0x00402E38
WARNING: Failed to read memory @ address 0x004053B4
WARNING: Failed to read memory @ address 0x00402DD8
WARNING: Failed to read memory @ address 0x004053CC
WARNING: Failed to read memory @ address 0x0040558C
Received monitor command: regs
Unsupported CPU!
Reading all registers
Read 4 bytes @ address 0x00013DDC (Data = 0x17FFFFFF)
Read 4 bytes @ address 0x00013DD8 (Data = 0xD503207F)
Read 4 bytes @ address 0x00013DDC (Data = 0x17FFFFFF)
Reading 64 bytes @ address 0x00901BC0
WARNING: Failed to read memory @ address 0xEF2D77F0
WARNING: Failed to read memory @ address 0xEF2D77EC
WARNING: Failed to read memory @ address 0xEF2D77F0
WARNING: Failed to read memory @ address 0xEF2D77F0
WARNING: Failed to read memory @ address 0xEF2D77EC
WARNING: Failed to read memory @ address 0xEF2D77F0
Reading 320 bytes @ address 0x33004000
WARNING: Failed to read memory @ address 0x33004000
WARNING: Failed to read memory @ address 0x33004000
WARNING: Failed to read memory @ address 0x3300413F

P.S.: Previously I worked with the i.MX6 Solox, where scriptfiles for Cortex-A9 and Cortex-M4 are available (see https://wiki.segger.com/i.MX6SoloX).

Remark: I just found the script for the Cortex-M4 inside the JLINK installation path: ../JLink/Devices/NXP/IMX8M . But there is no file for the Cortex-A53.

Thanks and best regards,

Pierre

Re: JTAG Debuger Selection For i.MX 8M Mini

matt67 — Mon, 10 May 2021 07:17:02 GMT

Hello, do you want to debug the M4 with IAR ? I never tried to debug the A53 Cortex.

Here is the setup for IAR you can probably adapt it for Eclipse :

In addition, a jlink script has to be defined in the IAR project file <ProjectName>_Debug.jlink

[BREAKPOINTS] ForceImpTypeAny = 0 ShowInfoWin = 1 EnableFlashBP = 2 BPDuringExecution = 0 [CFI] CFISize = 0x00 CFIAddr = 0x00 [CPU] MonModeVTableAddr = 0xFFFFFFFF MonModeDebug = 0 MaxNumAPs = 0 LowPowerHandlingMode = 0 OverrideMemMap = 0 AllowSimulation = 1 ScriptFile="./m4Test_DebugScript.jlink" [FLASH] CacheExcludeSize = 0x00 CacheExcludeAddr = 0x00 MinNumBytesFlashDL = 0 SkipProgOnCRCMatch = 1 VerifyDownload = 1 AllowCaching = 1 EnableFlashDL = 2 Override = 1 Device="Cortex-M4" [GENERAL] WorkRAMSize = 0x00 WorkRAMAddr = 0x00 RAMUsageLimit = 0x00 [SWO] SWOLogFile="" [MEM] RdOverrideOrMask = 0x00 RdOverrideAndMask = 0xFFFFFFFF RdOverrideAddr = 0xFFFFFFFF WrOverrideOrMask = 0x00 WrOverrideAndMask = 0xFFFFFFFF WrOverrideAddr = 0xFFFFFFFF

Content of m4Test_DebugScript.jlink for imx8Mmini M4 (and I think content differs from the official script) :

/********************************************************************* * (c) SEGGER Microcontroller GmbH & Co. KG * * The Embedded Experts * * www.segger.com * ********************************************************************** -------------------------- END-OF-HEADER ----------------------------- */ /********************************************************************* * * ResetTarget */ void ResetTarget(void) { // // This device requires a special reset as default reset does not work for this device. // TBD // } /********************************************************************* * * InitTarget */ void InitTarget(void) { int v; int Ctrl; int CSGPR_ADDR; int DP_REG_CTRL_STAT; int DP_REG_SELECT; int AHBAP_REG_CTRL; int AHBAP_REG_ADDR; int AHBAP_REG_DATA; DP_REG_CTRL_STAT = 1; DP_REG_SELECT = 2; AHBAP_REG_CTRL = 0; AHBAP_REG_ADDR = 1; AHBAP_REG_DATA = 3; Report("***************************************************"); Report("J-Link script: iMX8M Mini Cortex-M4 J-Link script"); Report("***************************************************"); JLINK_CORESIGHT_Configure("IRPre=0;DRPre=0;IRPost=0;DRPost=0;IRLenDevice=4"); CPU = CORTEX_M4; // Pre-select that we have a Cortex-M4 connected JTAG_AllowTAPReset = 0; // J-Link is allowed to use a TAP reset for JTAG-chain auto-detection // // Power-up complete DAP // Ctrl = 0 | (1 << 30) // System power-up | (1 << 28) // Debug popwer-up | (1 << 5) // Clear STICKYERR ; JLINK_CORESIGHT_WriteDP(DP_REG_CTRL_STAT, Ctrl); // // Select AHB-AP and configure it // JLINK_CORESIGHT_WriteDP(DP_REG_SELECT, (0 << 4) | (0 << 24)); Ctrl = 0 | (2 << 0) // AP-access size. Fixed to 2: 32-bit | (1 << 4) // Auto increment TAR after read/write access. Increment is NOT performed on access to banked data registers 0-3. | (1 << 31) // Enable software access to the Debug APB bus. ; JLINK_CORESIGHT_WriteAP(AHBAP_REG_CTRL, Ctrl); JLINK_CORESIGHT_WriteAP(AHBAP_REG_ADDR, 0x007E0000); JLINK_CORESIGHT_WriteAP(AHBAP_REG_DATA, 0x20008000); JLINK_CORESIGHT_WriteAP(AHBAP_REG_ADDR, 0x007E0004); JLINK_CORESIGHT_WriteAP(AHBAP_REG_DATA, 0x1FFE0009); JLINK_CORESIGHT_WriteAP(AHBAP_REG_ADDR, 0x007E0008); JLINK_CORESIGHT_WriteAP(AHBAP_REG_DATA, 0xE7FEE7FE); // // Manually configure which APs are present on the CoreSight device // JTAG_SetDeviceId(0, 0x5BA00477); // 4-bits IRLen CORESIGHT_AddAP(0, CORESIGHT_AHB_AP); // AXI-AP CORESIGHT_AddAP(1, CORESIGHT_APB_AP); // APB-AP for CA53 CORESIGHT_AddAP(2, CORESIGHT_CUSTOM_AP); CORESIGHT_AddAP(3, CORESIGHT_CUSTOM_AP); CORESIGHT_AddAP(4, CORESIGHT_AHB_AP); // AHB-AP CORESIGHT_IndexAHBAPToUse = 4; } /********************************************************************* * * SetupTarget */ void SetupTarget(void) { JLINK_MEM_WriteU32(0x3039000C, 0x000000A8); JLINK_MEM_WriteU32(0x3039000C, 0x000000AA); }

Then boot your board, and with u-boot start the M4 core with the command : bootaux 0x0

(Depending on were you want to load your firmware (0x0 is TCM, you have to adapt for DDR or OCRAM, and do the appropriate ICF memory zone arrangement and if DDR also reserved the area in Linux and make sure there is no peripheral conflicts with your dts)

After bootaux, you can load the firmware trough JTAG.

Re: JTAG Debuger Selection For i.MX 8M Mini

Pi93 — Mon, 10 May 2021 19:30:46 GMT

Hello,

thanks for the provided screenshots and JlinkScript. I got the Cortex-M4 of the I.MX 8M Mini running and I am able to debug it. But I was searching for debugging Cortex-A53 aswell.

I will post the settings for debugging the Cortex-M4 via Eclipse IDE for anyone stumbling over this topic:

Eclipse IDE - JTAG Debugger settingsEclipse IDE - JTAG StartupEclipse IDE - JTAG SVD files for peripherial registers

P.S.: See attached files.

Thanks again!

Re: JTAG Debuger Selection For i.MX 8M Mini

matt67 — Mon, 10 May 2021 19:40:52 GMT

Thanks for sharing the Eclipse settings, It may be usefull.

Are you interested in JTAG debuging A53 running Linux OS or any RTOS ?

Re: JTAG Debuger Selection For i.MX 8M Mini

Pi93 — Tue, 11 May 2021 07:26:04 GMT

I am interested in debugging Linux OS (Yocto Dunfell Project to be precise). For now I am using remote application debugging using Eclipse IDE via SSH, but I can not access memory or registers.

Re: JTAG Debuger Selection For i.MX 8M Mini

matt67 — Tue, 11 May 2021 07:47:15 GMT

Hello,

In fact you can use memtool from Linux to read or write any register or memory from Linux, this is limited to debug code but could help http://manpages.org/memtool/8

Or from JTAG I have with Segger a tool called JMem that allows to attach to the Cortex-A53 and dump all memory (without any specific script to make the debuger work)

Re: JTAG Debuger Selection For i.MX 8M Mini

HAA — Sun, 31 Jul 2022 18:23:04 GMT

I do. I am working with IMX 8M Mini processor and I am now looking for a debugger. I would like to debug a Linux-based project. This processor has 4 Cortex A53 cores and another one Cortex M4. I am looking for a debugger that can be useful for analyzing memory registers, variables, going through multi-threads... Which one can I use? Which one is the best one to debug a Linux project in Cortex A53 of IMX 8M Mini processor?

Thank you in advance,

Re: JTAG Debuger Selection For i.MX 8M Mini

Awindbiker — Thu, 11 Apr 2024 13:25:45 GMT

Any one tried with J-link Commander Tool to detect the Cortex-M4 of i.mx8m-plus SOM or Solid-Run or Humming Board Pulse ?