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    <title>i.MX Processors中的主题 Problem reading-writing on HyperRAM connected to flexSPI interface on iMX8 processor</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Problem-reading-writing-on-HyperRAM-connected-to-flexSPI/m-p/1177204#M164441</link>
    <description>&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;I am working on iMX8QXP based custom board with L5.4.24-2.1.0 and trying to interface an Octal RAM on its FlexSPI interface. The command set of the RAM I am using is similar to the Cypress S27KL/S27KS series HyperRAM and a PSRAM APS6408L-Ocx from apmemory. This has confused me whether I should use a spi-nor driver or hyperbus driver or make my own.&lt;/P&gt;&lt;P&gt;I have created a driver for Octal RAM "inspired" from spi-nor and fortunately, with few dummy cycles adjustment, I am able to read ID register and able to read-write to configuration register which are only 2 bytes long each.&lt;/P&gt;&lt;P&gt;My concern comes when I try to read-write data to/from memory. With dummy cycle adjustment I am able to read and write data to memory but I see many garbage bytes while reading.&lt;/P&gt;&lt;P&gt;I have learned that iMXRT1050 EVK has a hyperflash on board which is connected to the flexSPI interface. Also, I went through application note AN12239 &lt;STRONG&gt;How to enable HyperRAM with i.MX RT&lt;/STRONG&gt;&lt;SPAN&gt;. I also went through the iMX RT SDK demo but it did not help to solve the issue I am facing.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Is there any document on how to communicate to hyperRAM using flexSPIwith iMX8 processors?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Has anyone else faced a similar problem?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Thank you&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Priyank&lt;/SPAN&gt;&lt;/P&gt;</description>
    <pubDate>Tue, 03 Nov 2020 10:50:01 GMT</pubDate>
    <dc:creator>priyank_bhatt</dc:creator>
    <dc:date>2020-11-03T10:50:01Z</dc:date>
    <item>
      <title>Problem reading-writing on HyperRAM connected to flexSPI interface on iMX8 processor</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Problem-reading-writing-on-HyperRAM-connected-to-flexSPI/m-p/1177204#M164441</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;I am working on iMX8QXP based custom board with L5.4.24-2.1.0 and trying to interface an Octal RAM on its FlexSPI interface. The command set of the RAM I am using is similar to the Cypress S27KL/S27KS series HyperRAM and a PSRAM APS6408L-Ocx from apmemory. This has confused me whether I should use a spi-nor driver or hyperbus driver or make my own.&lt;/P&gt;&lt;P&gt;I have created a driver for Octal RAM "inspired" from spi-nor and fortunately, with few dummy cycles adjustment, I am able to read ID register and able to read-write to configuration register which are only 2 bytes long each.&lt;/P&gt;&lt;P&gt;My concern comes when I try to read-write data to/from memory. With dummy cycle adjustment I am able to read and write data to memory but I see many garbage bytes while reading.&lt;/P&gt;&lt;P&gt;I have learned that iMXRT1050 EVK has a hyperflash on board which is connected to the flexSPI interface. Also, I went through application note AN12239 &lt;STRONG&gt;How to enable HyperRAM with i.MX RT&lt;/STRONG&gt;&lt;SPAN&gt;. I also went through the iMX RT SDK demo but it did not help to solve the issue I am facing.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Is there any document on how to communicate to hyperRAM using flexSPIwith iMX8 processors?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Has anyone else faced a similar problem?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Thank you&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Priyank&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Tue, 03 Nov 2020 10:50:01 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Problem-reading-writing-on-HyperRAM-connected-to-flexSPI/m-p/1177204#M164441</guid>
      <dc:creator>priyank_bhatt</dc:creator>
      <dc:date>2020-11-03T10:50:01Z</dc:date>
    </item>
    <item>
      <title>Re: Problem reading-writing on HyperRAM connected to flexSPI interface on iMX8 processor</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Problem-reading-writing-on-HyperRAM-connected-to-flexSPI/m-p/1177577#M164474</link>
      <description>&lt;P&gt;Hi priyank_bhatt&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;reason for read issues may be that for hyperRAM it is necessary to use specific for it&lt;/P&gt;
&lt;P&gt;LUT table. Some details can be found in Figure 18-11. HyperBus device read transaction&lt;/P&gt;
&lt;P&gt;&lt;A id="relatedDocsClick_1" href="https://www.nxp.com/webapp/Download?colCode=IMX8DQXPRM" target="_blank" rel="noopener"&gt;&lt;STRONG&gt;i.MX 8DualXPlus/8QuadXPlus Applications Processor Reference Manual&lt;/STRONG&gt;&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;Application note AN12239 also can be useful as it describes similar FlexSPI module.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;/P&gt;</description>
      <pubDate>Wed, 04 Nov 2020 00:33:44 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Problem-reading-writing-on-HyperRAM-connected-to-flexSPI/m-p/1177577#M164474</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2020-11-04T00:33:44Z</dc:date>
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