<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Re: UART config after bl31.bin exit in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/UART-config-after-bl31-bin-exit/m-p/1176644#M164383</link>
    <description>&lt;P&gt;Hi Igor,&lt;/P&gt;&lt;P&gt;Thanks for the reply. I ran this test using a Lauterbach debugger by manually loading via JTAG just bl31.bin&amp;nbsp; on target and follow it by loading the test app for A53. Then, I set my PC to 0x80000000 and execute the image till handoff to my test app. I haven't manually loaded SCFW. My assumption was that bl31.bin is executing without loading SCFW and communicating with the SCU on its own. How does the SCFW get loaded, and from where in this test configuration ?&lt;/P&gt;&lt;P&gt;Regards&lt;/P&gt;&lt;P&gt;Ravi&lt;/P&gt;</description>
    <pubDate>Mon, 02 Nov 2020 12:47:02 GMT</pubDate>
    <dc:creator>rkohli2000</dc:creator>
    <dc:date>2020-11-02T12:47:02Z</dc:date>
    <item>
      <title>UART config after bl31.bin exit</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/UART-config-after-bl31-bin-exit/m-p/1176261#M164343</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;I'm trying to power on and config UART0 after the exit of bl31.bin (ATF) as bootloader so as to allow console access to an app that is depending on this UART config on the imx8QM MEK.&lt;/P&gt;&lt;P&gt;I am able to allocate a new partition and and use&amp;nbsp; SCFW APIs to set power_mode, clock_rate and enable the clock root. But I get an error (SC_ERR_NOACCESS or 3) when calling &lt;FONT face="courier new,courier" size="1 2 3 4 5 6 7"&gt;sc_pad_set(ipc_handle, SC_P_UART0_RX (or TX), UART_PAD_CTRL). &lt;/FONT&gt;At the end of this config of these pads 21 and 22, I checked the pads are not owned but they still are not assigned to my new partition even though &lt;FONT face="courier new,courier" size="1 2 3 4 5 6 7"&gt;sc_rm_assign_pad(ipc_handle, pt, SC_P_UART0_TX) &lt;/FONT&gt;returns SC_ERR_NONE. Appearing the pad is assigned normally and set movable.&lt;/P&gt;&lt;P&gt;Can anyone please suggest how I can ensure the pads are are correctly assigned to my partition for setup of the UART ?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;FONT face="courier new,courier" size="1 2 3 4 5 6 7"&gt;INFO: Entry point address = 0x80020000&lt;/FONT&gt;&lt;BR /&gt;&lt;FONT face="courier new,courier" size="1 2 3 4 5 6 7"&gt;INFO: SPSR = 0x3c9&lt;/FONT&gt;&lt;BR /&gt;&lt;FONT face="courier new,courier" size="1 2 3 4 5 6 7"&gt;INFO: BL31: Initializing runtime services&lt;/FONT&gt;&lt;BR /&gt;&lt;FONT face="courier new,courier" size="1 2 3 4 5 6 7"&gt;INFO: BL31: cortex_a53: CPU workaround for 855873 was applied&lt;/FONT&gt;&lt;BR /&gt;&lt;FONT face="courier new,courier" size="1 2 3 4 5 6 7"&gt;INFO: BL31: Preparing for EL3 exit to normal world&lt;/FONT&gt;&lt;BR /&gt;&lt;FONT face="courier new,courier" size="1 2 3 4 5 6 7"&gt;INFO: Entry point address = 0x80020000&lt;/FONT&gt;&lt;BR /&gt;&lt;FONT face="courier new,courier" size="1 2 3 4 5 6 7"&gt;INFO: SPSR = 0x3c9&lt;/FONT&gt;&lt;BR /&gt;&lt;FONT face="courier new,courier" size="1 2 3 4 5 6 7"&gt;INFO: cm_setup_context: enter&lt;/FONT&gt;&lt;BR /&gt;&lt;FONT face="courier new,courier" size="1 2 3 4 5 6 7"&gt;INFO: cm_setup_context: security_state=1&lt;/FONT&gt;&lt;BR /&gt;&lt;FONT face="courier new,courier" size="1 2 3 4 5 6 7"&gt;INFO: cm_setup_context: exit&lt;/FONT&gt;&lt;BR /&gt;&lt;FONT face="courier new,courier" size="1 2 3 4 5 6 7"&gt;INFO: cm_prepare_el3_exit: enter, security_state=1&lt;/FONT&gt;&lt;BR /&gt;&lt;FONT face="courier new,courier" size="1 2 3 4 5 6 7"&gt;INFO: cm_prepare_el3_exit: exit&lt;/FONT&gt;&lt;BR /&gt;&lt;FONT face="courier new,courier" size="1 2 3 4 5 6 7"&gt;INFO: next_image_info-&amp;gt;pc=0x80020000&lt;/FONT&gt;&lt;BR /&gt;&lt;FONT face="courier new,courier" size="1 2 3 4 5 6 7"&gt;INFO: bsp_uart_init: Init UART&lt;/FONT&gt;&lt;BR /&gt;&lt;FONT face="courier new,courier" size="1 2 3 4 5 6 7"&gt;INFO: bsp_uart_init: sc_rm_partition_alloc: pt=4&lt;/FONT&gt;&lt;BR /&gt;&lt;FONT face="courier new,courier" size="1 2 3 4 5 6 7"&gt;INFO: bsp_uart_init: sc_rm_assign_resource: pt=4&lt;/FONT&gt;&lt;BR /&gt;&lt;FONT face="courier new,courier" size="1 2 3 4 5 6 7"&gt;INFO: bsp_uart_init: sc_rm_is_pad_owned: pad=21 is not owned&lt;/FONT&gt;&lt;BR /&gt;&lt;FONT face="courier new,courier" size="1 2 3 4 5 6 7"&gt;INFO: bsp_uart_init: sc_rm_is_pad_owned: pad=22 is not owned&lt;/FONT&gt;&lt;BR /&gt;&lt;FONT face="courier new,courier" size="1 2 3 4 5 6 7" color="#00CCFF"&gt;INFO: bsp_uart_init: sc_rm_assign_pad(21): assigned, pt=4&lt;/FONT&gt;&lt;BR /&gt;&lt;FONT face="courier new,courier" size="1 2 3 4 5 6 7" color="#00CCFF"&gt;INFO: bsp_uart_init: sc_rm_assign_pad(22): assigned, pt=4&lt;/FONT&gt;&lt;/P&gt;&lt;P&gt;&lt;FONT face="courier new,courier" size="1 2 3 4 5 6 7" color="#FF0000"&gt;INFO: bsp_uart_init: sc_rm_set_pad_movable(21-22): movable, pt=4&lt;/FONT&gt;&lt;BR /&gt;&lt;FONT face="courier new,courier" size="1 2 3 4 5 6 7" color="#FF0000"&gt;INFO: bsp_uart_init: sc_rm_is_pad_owned: pad=21 is not owned&lt;/FONT&gt;&lt;BR /&gt;&lt;FONT face="courier new,courier" size="1 2 3 4 5 6 7" color="#FF0000"&gt;INFO: bsp_uart_init: sc_rm_is_pad_owned: pad=22 is not owned&lt;/FONT&gt;&lt;BR /&gt;&lt;FONT face="courier new,courier" size="1 2 3 4 5 6 7" color="#FF0000"&gt;ERROR: bsp_uart_init: sc_pad_set: pad=21, val=0x6000020, sciErr=4&lt;/FONT&gt;&lt;BR /&gt;&lt;FONT face="courier new,courier" size="1 2 3 4 5 6 7" color="#FF0000"&gt;ERROR: bsp_uart_init: sc_pad_set: pad=22, val=0x6000020, sciErr=4&lt;/FONT&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;/P&gt;</description>
      <pubDate>Sun, 01 Nov 2020 23:42:16 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/UART-config-after-bl31-bin-exit/m-p/1176261#M164343</guid>
      <dc:creator>rkohli2000</dc:creator>
      <dc:date>2020-11-01T23:42:16Z</dc:date>
    </item>
    <item>
      <title>Re: UART config after bl31.bin exit</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/UART-config-after-bl31-bin-exit/m-p/1176608#M164376</link>
      <description>&lt;P&gt;Hi rkohli2000&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;some SC_P_UART0 resources like SC_P_UART0_RTS,CTS can be used by M4 SDK&lt;/P&gt;
&lt;P&gt;in power_mode_switch.c example, so one can try to remove them in scfw&amp;nbsp; board.c file.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;/P&gt;</description>
      <pubDate>Mon, 02 Nov 2020 10:44:57 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/UART-config-after-bl31-bin-exit/m-p/1176608#M164376</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2020-11-02T10:44:57Z</dc:date>
    </item>
    <item>
      <title>Re: UART config after bl31.bin exit</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/UART-config-after-bl31-bin-exit/m-p/1176644#M164383</link>
      <description>&lt;P&gt;Hi Igor,&lt;/P&gt;&lt;P&gt;Thanks for the reply. I ran this test using a Lauterbach debugger by manually loading via JTAG just bl31.bin&amp;nbsp; on target and follow it by loading the test app for A53. Then, I set my PC to 0x80000000 and execute the image till handoff to my test app. I haven't manually loaded SCFW. My assumption was that bl31.bin is executing without loading SCFW and communicating with the SCU on its own. How does the SCFW get loaded, and from where in this test configuration ?&lt;/P&gt;&lt;P&gt;Regards&lt;/P&gt;&lt;P&gt;Ravi&lt;/P&gt;</description>
      <pubDate>Mon, 02 Nov 2020 12:47:02 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/UART-config-after-bl31-bin-exit/m-p/1176644#M164383</guid>
      <dc:creator>rkohli2000</dc:creator>
      <dc:date>2020-11-02T12:47:02Z</dc:date>
    </item>
    <item>
      <title>Re: UART config after bl31.bin exit</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/UART-config-after-bl31-bin-exit/m-p/1176705#M164388</link>
      <description>&lt;P&gt;&amp;gt; My assumption was that bl31.bin is executing without loading SCFW&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;one can look at description of boot process in sc_fw_api_qm_b0.pdf included in&lt;/P&gt;
&lt;P&gt;&lt;A style="box-sizing: border-box; background-color: transparent; color: #215bd6; text-decoration: none; cursor: pointer;" href="https://www.nxp.com/webapp/Download?colCode=L5.4.47_2.2.0_SCFWKIT-1.6.0&amp;amp;appType=license" target="_blank"&gt;SCFW Porting Kit​&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;and link &lt;A href="https://community.nxp.com/t5/i-MX-Processors-Knowledge-Base/i-MX8-Boot-process-and-creating-a-bootable-image/ta-p/1101253" target="_blank"&gt;https://community.nxp.com/t5/i-MX-Processors-Knowledge-Base/i-MX8-Boot-process-and-creating-a-bootable-image/ta-p/1101253&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="1.jpg" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/128850i59D458132E3C42BC/image-size/medium?v=v2&amp;amp;px=400" role="button" title="1.jpg" alt="1.jpg" /&gt;&lt;span class="lia-inline-image-caption" onclick="event.preventDefault();"&gt;1.jpg&lt;/span&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt; &lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Mon, 02 Nov 2020 14:31:49 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/UART-config-after-bl31-bin-exit/m-p/1176705#M164388</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2020-11-02T14:31:49Z</dc:date>
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  </channel>
</rss>

