i.MX Processors中的主题 Re: iMX6DQ IPU CPMEM Bus Address

iMX6DQ IPU CPMEM Bus Address

ogj — Tue, 13 Oct 2020 20:39:52 GMT

I'd like to know the bus address for the CPMEM for ipu1 and ipu2 in the iMX6Q. According to the RM, ipu1 is at 0x0260_0000 and ipu2 is at 0x02A0_0000. It appears from the SDK that the CPMEM is at the ipu base address + 0x0010_0000, but I'd like to make sure.

Another thing that puzzles me is the the RM shows the structure of the CPMEM as 80 channels x 2 mega-words per channel; each mega-word being 160-bits (5x 32-bit words).

The SDK structs for the CPMEM are:

struct ipu_cpmem_word
{
uint32_t data[5];
uint32_t res[3];
};

typedef struct ipu_cpmem
{
struct ipu_cpmem_word word[2];
} ipu_cpmem_t;

in the ipu_common.h file. I don't understand what the res[3] is for after each 160-bit mega-word.

iMX6 SDK shows the structure of

Re: iMX6DQ IPU CPMEM Bus Address

igorpadykov — Wed, 14 Oct 2020 01:10:06 GMT

Hi ogj

>appears from the SDK that the CPMEM is at the ipu base address + 0x0010_0000,

>but I'd like to make sure.

correct

>I don't understand what the res[3] is for after each 160-bit mega-word.

one can refer to (Word 1) Table 37-14. Channel Parameters Memory

i.MX 6Dual/6Quad Applications Processor Reference Manual

Best regards
igor

Re: iMX6DQ IPU CPMEM Bus Address

ogj — Wed, 14 Oct 2020 04:26:39 GMT

Found the answer in Section 37.4.2.10.2 of the RM. Although each mega-word is 160 bits (5x 32-bit words), each word has to start on a 256-bit boundary (8x 32-bit words).

Thanks for your quick response.