<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Re: Issue with multiple SPI_BURST when imx6 comfigured in SPI SLAVE mode in i.MX Processors</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/Issue-with-multiple-SPI-BURST-when-imx6-comfigured-in-SPI-SLAVE/m-p/227047#M16328</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;The iMX53 and iMX6 ECSPI module is very buggy and this is an (as of yet undocumented) silicon bug, The ECSPI module behaves erratically when the bitcount is [(32 * n) + 1] with [n &amp;gt; 0].&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;For an in-depth analysis see &lt;A href="http://guruce.com/blogpost/freescale-imx53-ecspi-silicon-bug" title="http://guruce.com/blogpost/freescale-imx53-ecspi-silicon-bug"&gt;http://guruce.com/blogpost/freescale-imx53-ecspi-silicon-bug&lt;/A&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Mon, 05 Aug 2013 08:15:53 GMT</pubDate>
    <dc:creator>MichaelV</dc:creator>
    <dc:date>2013-08-05T08:15:53Z</dc:date>
    <item>
      <title>Issue with multiple SPI_BURST when imx6 comfigured in SPI SLAVE mode</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Issue-with-multiple-SPI-BURST-when-imx6-comfigured-in-SPI-SLAVE/m-p/227046#M16327</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I am using imx6 as a SPI SLAVE to communicate with external peripheral which is acting as SPI MASTER. &lt;/P&gt;&lt;P&gt;Size of data to be shifted out is more than 512KB. I am setting burst_length value to maximum which is 2^7 (128) words. My data is being shifted out in multiple SPI Burst, but I am getting a strange result at the end of each spi burst. My 128*1 + 1, 128*3 + 1, 128*5 + 1..... words are getting replaced with zeros. Rest of the data before and after these words are fine.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;eCSPI settings&lt;/P&gt;&lt;P&gt;Burst Len = 0xFFF&lt;/P&gt;&lt;P&gt;bpw = 32&lt;/P&gt;&lt;P&gt;CPOL = 0&lt;/P&gt;&lt;P&gt;CPHA = 0&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Am I missing something here? &lt;/P&gt;&lt;P&gt;Any pointers will be appreciated.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;alam&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 18 Jun 2013 19:36:36 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Issue-with-multiple-SPI-BURST-when-imx6-comfigured-in-SPI-SLAVE/m-p/227046#M16327</guid>
      <dc:creator>cheersalam</dc:creator>
      <dc:date>2013-06-18T19:36:36Z</dc:date>
    </item>
    <item>
      <title>Re: Issue with multiple SPI_BURST when imx6 comfigured in SPI SLAVE mode</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Issue-with-multiple-SPI-BURST-when-imx6-comfigured-in-SPI-SLAVE/m-p/227047#M16328</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;The iMX53 and iMX6 ECSPI module is very buggy and this is an (as of yet undocumented) silicon bug, The ECSPI module behaves erratically when the bitcount is [(32 * n) + 1] with [n &amp;gt; 0].&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;For an in-depth analysis see &lt;A href="http://guruce.com/blogpost/freescale-imx53-ecspi-silicon-bug" title="http://guruce.com/blogpost/freescale-imx53-ecspi-silicon-bug"&gt;http://guruce.com/blogpost/freescale-imx53-ecspi-silicon-bug&lt;/A&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 05 Aug 2013 08:15:53 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Issue-with-multiple-SPI-BURST-when-imx6-comfigured-in-SPI-SLAVE/m-p/227047#M16328</guid>
      <dc:creator>MichaelV</dc:creator>
      <dc:date>2013-08-05T08:15:53Z</dc:date>
    </item>
    <item>
      <title>Re: Issue with multiple SPI_BURST when imx6 comfigured in SPI SLAVE mode</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Issue-with-multiple-SPI-BURST-when-imx6-comfigured-in-SPI-SLAVE/m-p/227048#M16329</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Can anyone from Freescale confirm Michel's bug for i.mx6? We're beginning to implement an SPI slave driver and this could impact its usability.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 05 Mar 2014 16:37:20 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Issue-with-multiple-SPI-BURST-when-imx6-comfigured-in-SPI-SLAVE/m-p/227048#M16329</guid>
      <dc:creator>craigdenson</dc:creator>
      <dc:date>2014-03-05T16:37:20Z</dc:date>
    </item>
    <item>
      <title>Re: Issue with multiple SPI_BURST when imx6 comfigured in SPI SLAVE mode</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Issue-with-multiple-SPI-BURST-when-imx6-comfigured-in-SPI-SLAVE/m-p/227049#M16330</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hci Craig, We are now using the SPI of imx6q as slave mode with DMA transfer to receive data from the other devices. Have you finish your wok implement SPI slave driver?Can your driver transfer with DMA?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sat, 09 Aug 2014 09:57:20 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Issue-with-multiple-SPI-BURST-when-imx6-comfigured-in-SPI-SLAVE/m-p/227049#M16330</guid>
      <dc:creator>huang_dexiang</dc:creator>
      <dc:date>2014-08-09T09:57:20Z</dc:date>
    </item>
    <item>
      <title>Re: Issue with multiple SPI_BURST when imx6 comfigured in SPI SLAVE mode</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/Issue-with-multiple-SPI-BURST-when-imx6-comfigured-in-SPI-SLAVE/m-p/227050#M16331</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Huang,&lt;/P&gt;&lt;P&gt;I also try to use the SPI as slave mode with DMA transfer, but is have some problems configuring the slave correct. &lt;/P&gt;&lt;P&gt;I’m using two imx6q, one as master the other one as slave. Transmitting data from the master via the DMA is working. But I think there goes something wrong in my configuration on the slave. Can you tell me how your slave configuration looks like?&lt;/P&gt;&lt;P&gt;Thanks &lt;/P&gt;&lt;P&gt;Peter&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 10 Jun 2015 06:08:58 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/Issue-with-multiple-SPI-BURST-when-imx6-comfigured-in-SPI-SLAVE/m-p/227050#M16331</guid>
      <dc:creator>peterw</dc:creator>
      <dc:date>2015-06-10T06:08:58Z</dc:date>
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  </channel>
</rss>

