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    <title>i.MX ProcessorsのトピックRe: i.MX8M mini DDR4 bring-up</title>
    <link>https://community.nxp.com/t5/i-MX-Processors/i-MX8M-mini-DDR4-bring-up/m-p/1165671#M163274</link>
    <description>&lt;P&gt;Thank you Igor!&lt;/P&gt;&lt;P&gt;Best regards&lt;/P&gt;</description>
    <pubDate>Mon, 12 Oct 2020 00:50:54 GMT</pubDate>
    <dc:creator>saidjazouly</dc:creator>
    <dc:date>2020-10-12T00:50:54Z</dc:date>
    <item>
      <title>i.MX8M mini DDR4 bring-up</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX8M-mini-DDR4-bring-up/m-p/1165342#M163234</link>
      <description>&lt;P&gt;Good day all,&lt;/P&gt;&lt;P&gt;we are trying to bring-up and run the DDR stress tests on a custom designed i.MX8M mini board.&lt;/P&gt;&lt;P&gt;On the evk using PMIC BD718XX we see the PMIC getting detect, whereas our board that uses &lt;STRONG&gt;PCA9450AHN&lt;/STRONG&gt; the tool doesn't detect it, however the tool continues and stops just before the DDR tests begin. (log files below)&lt;/P&gt;&lt;P&gt;we used&amp;nbsp;&lt;EM&gt;mscale_ddr_tool_v3.10&lt;/EM&gt; with script generated from &lt;EM&gt;MX8M_Mini_DDR4_RPA_v11.xlsx&lt;/EM&gt; adapted to our DDR4 memory (Samsung &lt;STRONG&gt;K4A8G165WC-BCTD&lt;/STRONG&gt;).&lt;/P&gt;&lt;OL&gt;&lt;LI&gt;Are there any settings that need to change in the .ds script (using &lt;EM&gt;MX8M_Mini_DDR4_RPA_v11.xlsx&lt;/EM&gt;) to correctly address and test our DDR4 memory?&lt;/LI&gt;&lt;LI&gt;Any specific voltages that need to be checked on the NXP PMIC outputs to make sure the processors and other peripherals are well supplied&lt;/LI&gt;&lt;LI&gt;Is the &lt;EM&gt;mscale_ddr_tool_v3.10&lt;/EM&gt; suited for various types of PMICs and not only the ROHM part used on the evk&amp;nbsp; 8MMINID4-EVK?&lt;/LI&gt;&lt;/OL&gt;&lt;P&gt;Thank you in advance.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;For some reason the attachments upload doesn't work so here is the output from the custom board:&lt;/P&gt;&lt;P&gt;&lt;FONT size="3"&gt;Downloading file 'bin\ddr4_train1d_string.bin' ..Done&lt;/FONT&gt;&lt;/P&gt;&lt;P&gt;&lt;FONT size="3"&gt;Downloading file 'bin\ddr4_train2d_string.bin' ..Done&lt;/FONT&gt;&lt;/P&gt;&lt;P&gt;&lt;FONT size="3"&gt;Downloading file 'bin\ddr4_imem_1d.bin' ..Done&lt;/FONT&gt;&lt;/P&gt;&lt;P&gt;&lt;FONT size="3"&gt;Downloading file 'bin\ddr4_dmem_1d.bin' ..Done&lt;/FONT&gt;&lt;/P&gt;&lt;P&gt;&lt;FONT size="3"&gt;Downloading file 'bin\ddr4_imem_2d.bin' ..Done&lt;/FONT&gt;&lt;/P&gt;&lt;P&gt;&lt;FONT size="3"&gt;Downloading file 'bin\ddr4_dmem_2d.bin' ..Done&lt;/FONT&gt;&lt;/P&gt;&lt;P&gt;&lt;FONT size="3"&gt;Downloading IVT header...Done&lt;/FONT&gt;&lt;BR /&gt;&lt;FONT size="3"&gt;Downloading file 'bin\m845s_ddr_stress_test.bin' ...Done&lt;/FONT&gt;&lt;/P&gt;&lt;P&gt;&lt;FONT size="3"&gt;Download is complete&lt;/FONT&gt;&lt;BR /&gt;&lt;FONT size="3"&gt;Waiting for the target board boot...&lt;/FONT&gt;&lt;/P&gt;&lt;P&gt;&lt;FONT size="3"&gt;===================hardware_init=====================&lt;/FONT&gt;&lt;BR /&gt;&lt;FONT size="3"&gt;hardware_init exit&lt;/FONT&gt;&lt;/P&gt;&lt;P&gt;&lt;FONT size="3"&gt;*************************************************************************&lt;/FONT&gt;&lt;/P&gt;&lt;P&gt;&lt;FONT size="3"&gt;*************************************************************************&lt;/FONT&gt;&lt;/P&gt;&lt;P&gt;&lt;FONT size="3"&gt;*************************************************************************&lt;/FONT&gt;&lt;BR /&gt;&lt;FONT size="3"&gt;MX8 DDR Stress Test V3.10&lt;/FONT&gt;&lt;BR /&gt;&lt;FONT size="3"&gt;Built on Feb 5 2020 13:04:09&lt;/FONT&gt;&lt;BR /&gt;&lt;FONT size="3"&gt;*************************************************************************&lt;/FONT&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;FONT size="3"&gt;and here is the one from the evk:&lt;/FONT&gt;&lt;/P&gt;&lt;P&gt;Downloading file 'bin\ddr4_train1d_string.bin' ..Done&lt;/P&gt;&lt;P&gt;Downloading file 'bin\ddr4_train2d_string.bin' ..Done&lt;/P&gt;&lt;P&gt;Downloading file 'bin\ddr4_imem_1d.bin' ..Done&lt;/P&gt;&lt;P&gt;Downloading file 'bin\ddr4_dmem_1d.bin' ..Done&lt;/P&gt;&lt;P&gt;Downloading file 'bin\ddr4_imem_2d.bin' ..Done&lt;/P&gt;&lt;P&gt;Downloading file 'bin\ddr4_dmem_2d.bin' ..Done&lt;/P&gt;&lt;P&gt;Downloading IVT header...Done&lt;BR /&gt;Downloading file 'bin\m845s_ddr_stress_test.bin' ...Done&lt;/P&gt;&lt;P&gt;Download is complete&lt;BR /&gt;Waiting for the target board boot...&lt;/P&gt;&lt;P&gt;===================hardware_init=====================&lt;/P&gt;&lt;P&gt;********Found PMIC BD718XX**********&lt;BR /&gt;hardware_init exit&lt;/P&gt;&lt;P&gt;*************************************************************************&lt;/P&gt;&lt;P&gt;*************************************************************************&lt;/P&gt;&lt;P&gt;*************************************************************************&lt;BR /&gt;MX8 DDR Stress Test V3.10&lt;BR /&gt;Built on Feb 5 2020 13:04:09&lt;BR /&gt;*************************************************************************&lt;/P&gt;&lt;P&gt;--Set up the MMU and enable I and D cache--&lt;BR /&gt;- This is the Cortex-A53 core&lt;BR /&gt;- Check if I cache is enabled&lt;BR /&gt;- Enabling I cache since it was disabled&lt;BR /&gt;- Push base address of TTB to TTBR0_EL3&lt;BR /&gt;- Config TCR_EL3&lt;BR /&gt;- Config MAIR_EL3&lt;BR /&gt;- Enable MMU&lt;BR /&gt;- Data Cache has been enabled&lt;BR /&gt;- Check system memory register, only for debug&lt;/P&gt;&lt;P&gt;- VMCR Check:&lt;BR /&gt;- ttbr0_el3: 0x93d000&lt;BR /&gt;- tcr_el3: 0x2051c&lt;BR /&gt;- mair_el3: 0x774400&lt;BR /&gt;- sctlr_el3: 0xc01815&lt;BR /&gt;- id_aa64mmfr0_el1: 0x1122&lt;/P&gt;&lt;P&gt;- MMU and cache setup complete&lt;/P&gt;&lt;P&gt;*************************************************************************&lt;BR /&gt;ARM clock(CA53) rate: 1800MHz&lt;BR /&gt;DDR Clock: 0MHz&lt;/P&gt;&lt;P&gt;============================================&lt;BR /&gt;DDR configuration&lt;BR /&gt;DDR type is DDR4&lt;BR /&gt;Data width: 32, bank num: 8&lt;BR /&gt;For DDR4, bank num is the total of 2 bank groups and 4 banks per group&lt;BR /&gt;Row size: 16, col size: 10&lt;BR /&gt;One chip select is used&lt;BR /&gt;Number of DDR controllers used on the SoC: 1&lt;BR /&gt;Density per chip select: 2048MB&lt;BR /&gt;Density per controller is: 2048MB&lt;BR /&gt;Total density detected on the board is: 2048MB&lt;BR /&gt;============================================&lt;/P&gt;&lt;P&gt;MX8M-mini: Cortex-A53 is found&lt;/P&gt;&lt;P&gt;*************************************************************************&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;thank you.&lt;/P&gt;</description>
      <pubDate>Fri, 09 Oct 2020 20:46:01 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX8M-mini-DDR4-bring-up/m-p/1165342#M163234</guid>
      <dc:creator>saidjazouly</dc:creator>
      <dc:date>2020-10-09T20:46:01Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX8M mini DDR4 bring-up</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX8M-mini-DDR4-bring-up/m-p/1165436#M163247</link>
      <description>&lt;P&gt;Hi saidjazouly&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;pmic voltages can be adjusted using example on below link (at bottom)&lt;/P&gt;
&lt;P&gt;&lt;A href="https://community.nxp.com/t5/i-MX-Processors-Knowledge-Base/i-MX-8M-Family-DDR-Tool-Release/ta-p/1104467" target="_blank"&gt;https://community.nxp.com/t5/i-MX-Processors-Knowledge-Base/i-MX-8M-Family-DDR-Tool-Release/ta-p/1104467&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;adjust them according to requirements given in Datasheet and Hardware Guide from link&lt;/P&gt;
&lt;P&gt;&lt;A href="https://www.nxp.com/products/processors-and-microcontrollers/arm-processors/i-mx-applications-processors/i-mx-8-processors/i-mx-8m-mini-arm-cortex-a53-cortex-m4-audio-voice-video:i.MX8MMINI?tab=Documentation_Tab" target="_blank"&gt;https://www.nxp.com/products/processors-and-microcontrollers/arm-processors/i-mx-applications-processors/i-mx-8-processors/i-mx-8m-mini-arm-cortex-a53-cortex-m4-audio-voice-video:i.MX8MMINI?tab=Documentation_Tab&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Best regards&lt;BR /&gt;igor&lt;/P&gt;</description>
      <pubDate>Sat, 10 Oct 2020 00:15:20 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX8M-mini-DDR4-bring-up/m-p/1165436#M163247</guid>
      <dc:creator>igorpadykov</dc:creator>
      <dc:date>2020-10-10T00:15:20Z</dc:date>
    </item>
    <item>
      <title>Re: i.MX8M mini DDR4 bring-up</title>
      <link>https://community.nxp.com/t5/i-MX-Processors/i-MX8M-mini-DDR4-bring-up/m-p/1165671#M163274</link>
      <description>&lt;P&gt;Thank you Igor!&lt;/P&gt;&lt;P&gt;Best regards&lt;/P&gt;</description>
      <pubDate>Mon, 12 Oct 2020 00:50:54 GMT</pubDate>
      <guid>https://community.nxp.com/t5/i-MX-Processors/i-MX8M-mini-DDR4-bring-up/m-p/1165671#M163274</guid>
      <dc:creator>saidjazouly</dc:creator>
      <dc:date>2020-10-12T00:50:54Z</dc:date>
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