topic Why is LPSPI1 missing on v5.4 BSP for iMX8QXP? in i.MX Processors

Why is LPSPI1 missing on v5.4 BSP for iMX8QXP?

HectorPalacios — Mon, 05 Oct 2020 06:37:57 GMT

Hello,

The HRM of the iMX8QXP shows there are four LPSPI buses:

The device tree however only lists three of them. LPSPI1 is missing and thus not available:

https://source.codeaurora.org/external/imx/linux-imx/tree/arch/arm64/boot/dts/freescale/imx8-ss-dma....

What's the issue here with LPSPI1?

Thank you,

Héctor Palacios

Re: Why is LPSPI1 missing on v5.4 BSP for iMX8QXP?

igorpadykov — Mon, 05 Oct 2020 09:39:41 GMT

Hi Héctor

there is no issue here with LPSPI1, on MEK board suitable pads are used for

other peripherals, muxing options can be found in sect.9.1.External Signals and Pin Assignments

i.MX 8DualXPlus/8QuadXPlus Applications Processor Reference Manual

As example one can try below:

Fsl-imx8dx.dtsi :
lpspi1: lpspi@5a010000 {

compatible = "fsl,imx7ulp-spi";
reg = <0x0 0x5a010000 0x0 0x10000>;
interrupts = <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>;
interrupt-parent = <&gic>;
clocks = <&clk IMX8QXP_SPI1_CLK>,
<&clk IMX8QXP_SPI1_IPG_CLK>;
clock-names = "per", "ipg";
assigned-clocks = <&clk IMX8QXP_SPI1_CLK>;
assigned-clock-rates = <20000000>;
power-domains = <&pd_dma_lpspi1>;
status = "disabled";
};

Fsl-imx8qxp-mek.dts:

pinctrl_lpspi1: lpspi1grp {

fsl,pins = <
SC_P_SAI0_TXFS_ADMA_SPI1_SCK 0xD600004c
SC_P_SAI0_TXD_ADMA_SPI1_SDO 0xD600004c
SC_P_SAI0_TXC_ADMA_SPI1_SDI 0xD600004c
>;

};

pinctrl_lpspi1_cs: lpspi1cs {

fsl,pins = <
SC_P_SAI0_RXD_LSIO_GPIO0_IO27 0xE0000021
>;
};

&lpspi1 {
#address-cells = <1>;
#size-cells = <0>;
fsl,spi-num-chipselects = <1>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lpspi1 &pinctrl_lpspi1_cs>;
cs-gpios = <&gpio0 27 GPIO_ACTIVE_LOW>;
status = "okay";

spidev@0 {

compatible = "rohm,dh2228fv";
status = "okay";
spi-max-frequency = <1000000>;
reg = <0>;
};

};

driver clk-imx8qxp.c

clks[IMX8QXP_SPI1_CLK] = imx_clk_gate_scu("spi1_clk", "spi1_div", SC_R_SPI_1, SC_PM_CLK_PER, (void __iomem *)(LPSPI_1_LPCG), 0, 0);

Best regards
igor

Re: Why is LPSPI1 missing on v5.4 BSP for iMX8QXP?

HectorPalacios — Wed, 07 Oct 2020 06:30:41 GMT

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Re: Why is LPSPI1 missing on v5.4 BSP for iMX8QXP?

HectorPalacios — Wed, 07 Oct 2020 06:30:28 GMT

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Re: Why is LPSPI1 missing on v5.4 BSP for iMX8QXP?

HectorPalacios — Wed, 07 Oct 2020 06:30:16 GMT

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Re: Why is LPSPI1 missing on v5.4 BSP for iMX8QXP?

HectorPalacios — Tue, 06 Oct 2020 13:48:34 GMT

Thanks @igorpadykov but the fact that LPSPI1 is not suitable for the MEK doesn't justify that the bus itself is not defined at all on the imx8-ss-dma.dtsi DTSI include file.

Besides, IMX8QXP_SPI1_xxx defines are missing from include/dt-bindings/pinctrl/pads-imx8qxp.h and thus not used either on drivers/pinctrl/freescale/pinctrl-imx8qxp.c

Do you have values for those? Because it looks like this bus and pads are completely missing from the BSP. That's why it looks like intentionally left out stuff.

Regards,

Hector

Re: Why is LPSPI1 missing on v5.4 BSP for iMX8QXP?

HectorPalacios — Wed, 07 Oct 2020 06:30:02 GMT

-removed-

Re: Why is LPSPI1 missing on v5.4 BSP for iMX8QXP?

HectorPalacios — Wed, 07 Oct 2020 06:29:41 GMT

-removed-

Re: Why is LPSPI1 missing on v5.4 BSP for iMX8QXP?

HectorPalacios — Wed, 07 Oct 2020 06:29:26 GMT

Re: Why is LPSPI1 missing on v5.4 BSP for iMX8QXP?

igorpadykov — Fri, 09 Oct 2020 14:21:08 GMT

Hi Hector

I asked internally, below answer

-------------------

Indeed, the lpspi1 node definition is missing from the dts, most likely because it can't be tested on the mek board.

But the definitions for the pinmux options for the lpspi1 external signals are already available in include/dt-bindings/pinctrl/pads-imx8qxp.h

As an addition to what you already provided in the public thread, you can also add the property necessary to be able to use the dma.

lpspi1: spi@5a010000 {
    compatible = "fsl,imx7ulp-spi";
    reg = <0x5a010000 0x10000>;
    #address-cells = <1>;
    #size-cells = <0>;
    interrupts = <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>;
    interrupt-parent = <&gic>;
    clocks = <&spi1_lpcg 0>,
                  <&spi1_lpcg 1>;
    clock-names = "per", "ipg";
    assigned-clocks = <&clk IMX_SC_R_SPI_1 IMX_SC_PM_CLK_PER>;
    assigned-clock-rates = <20000000>;
    power-domains = <&pd IMX_SC_R_SPI_1>;
    dma-names = "tx","rx";
    dmas = <&edma2 3 0 0>, <&edma2 2 0 1>;
    status = "disabled";
};

This is for release 5.4.24.

-------------------

Best regards
igor